Chip-scale optical interconnect using microLEDs

US11515356B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11515356-B2
Application numberUS-202016913905-A
CountryUS
Kind codeB2
Filing dateJun 26, 2020
Priority dateJun 27, 2019
Publication dateNov 29, 2022
Grant dateNov 29, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In package intra-chip and/or inter-chip optical communications are provided using microLEDs and photodetectors mounted to integrated circuit (IC) chips and/or to transceiver dies associated with the IC chips. Light from the LEDs may pass through waveguides on or in a substrate to which the IC chips are mounted or which couple the IC chips.

First claim

Opening claim text (preview).

What is claimed is: 1. An optical communications system for semiconductor chips on a common substrate, comprising: a plurality of first microLEDs on a first semiconductor chip, the first semiconductor chip electrically coupled to a substrate; a plurality of first photodetectors part of a second semiconductor chip, the second semi-conductor chip electrically coupled to the substrate; a plurality of waveguides, each of the plurality of waveguides coupling different ones of the plurality of first microLEDs with different ones of the plurality of first photodetectors; a plurality of second microLEDs on the second semiconductor chip; a plurality of second photodetectors part of the first semiconductor chip; and a further plurality of waveguides, each of the further plurality of waveguides coupling different ones of the plurality of second microLEDs with different ones of the plurality of second photodetectors; wherein the first semiconductor chip includes first drive circuitry for driving the plurality of first microLEDs and first receive circuitry for processing signals generated by the plurality of second photodetectors, and the second semiconductor chip includes second drive circuitry for driving the plurality of second microLEDs and second receive circuitry for processing signals generated by the plurality of first photodetectors; and further comprising a semiconductor package; wherein the plurality of first microLEDs and the first semiconductor chip are in the semiconductor package; and wherein the plurality of first photodetectors and the second semiconductor chip are in the semiconductor package. 2. The optical communication system of claim 1 , wherein the first semiconductor chip comprises a first transceiver die and the second semiconductor chip comprises a second transceiver die, and further comprising: a third semiconductor chip electrically coupled to the first transceiver die; and a fourth semiconductor chip electrically coupled to the second transceiver die.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • H10W90/00Primary

    Package configurations · CPC title

  • Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections · CPC title

  • the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device (G02B6/4246 takes precedence) · CPC title

  • Three-dimensional structures · CPC title

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What does patent US11515356B2 cover?
In package intra-chip and/or inter-chip optical communications are provided using microLEDs and photodetectors mounted to integrated circuit (IC) chips and/or to transceiver dies associated with the IC chips. Light from the LEDs may pass through waveguides on or in a substrate to which the IC chips are mounted or which couple the IC chips.
Who is the assignee on this patent?
Pezeshki Bardia, Kalman Robert, Avicenatech Corp
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 29 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).