Delta-sigma modulation type A/D converter

Patent metadata

Field	Value
Publication number	US-12101105-B2
Application number	US-202217967095-A
Country	US
Kind code	B2
Filing date	Oct 17, 2022
Priority date	Dec 23, 2021
Publication date	Sep 24, 2024
Grant date	Sep 24, 2024

Abstract

A delta-sigma modulation type A/D converter includes: a capacitively coupled amplifier having a sampling capacitor, a feedback capacitor, and an amplifier; a correlated double sampling type first integrator as a first-stage integrator, which is connected to the capacitively coupled amplifier without a switch; a second integrator arranged after the first integrator; a quantizer arranged after the second integrator and quantizing an output of the second integrator; and an D/A converter that D/A-converts an output of the quantizer and feeds back to any one of the capacitively coupled amplifier, the first integrator, and the second integrator.

First claim

What is claimed is:

1. A delta-sigma modulation type A/D converter that digitally converts an analog input signal, the A/D converter comprising:
a capacitively coupled amplifier having a sampling capacitor, a feedback capacitor, and an amplifier, and amplifying the analog input signal;
a correlated double sampling type first integrator that is disposed after the capacitively coupled amplifier, as a first-stage integrator, wherein an output of the capacitively coupled amplifier and an input of the sampling capacitor of the first integrator are directly connected to each other without a switch;
a second integrator arranged after the first integrator;
a quantizer arranged after the second integrator and quantizing an output of the second integrator; and
an D/A converter that D/A-converts an output of the quantizer and feeds back to any one of the capacitively coupled amplifier, the first integrator, and the second integrator.

2. The delta-sigma modulation type A/D converter according to claim 1 , wherein:
the D/A converter is configured to feed back the output to the capacitive coupled amplifier.

3. The delta-sigma modulation type A/D converter according to claim 1 , wherein:
the D/A converter includes: a first D/A converter that feeds back the output of the quantizer to the capacitively coupled amplifier; and a second D/A converter that feeds back the output of the quantizer to the first integrator.

4. The delta-sigma modulation type A/D converter according to claim 3 , further comprising:
a temperature acquisition unit that acquires temperature, wherein:
the first D/A converter is configured to output a voltage that increases with the temperature and feed back to the capacitively coupled amplifier;
the second D/A converter is configured to output a voltage that decreases with the temperature and feed back to the first integrator; and
a temperature compensation amount is adjusted by adjusting a feedback amount of the second D/A converter.

5. The delta-sigma modulation type A/D converter according to claim 4 , wherein:
the D/A converter includes: the first D/A converter; the second D/A converter; and a third D/A converter that feeds back the output of the quantizer to the first integrator;
the third D/A converter is configured to output a voltage that decreases with the temperature and feed back to the first integrator; and
the temperature compensation amount of an input signal is roughly adjusted by adjusting a feedback amount of the third D/A converter.

6. The delta-sigma modulation type A/D converter according to claim 3 , further comprising:
a feedback amount adjustment circuit that adjusts a feedback amount of the second D/A converter for each quantization result of the quantizer; and
a mechanism that determines an output voltage of the second D/A converter according to the feedback amount adjustment circuit.

7. The delta-sigma modulation type A/D converter according to claim 1 , wherein:
the converter has a CIFF configuration or a CIFB configuration.

8. The delta-sigma modulation type A/D converter according to claim 1 , wherein:
an input unit for inputting an analog input signal and a subsequent stage of an output unit of the quantizer function to perform a chopping operation.

9. The delta-sigma modulation type A/D converter according to claim 8 , wherein:
an input unit for inputting the analog input signal, a preceding stage and a subsequent stage of a feedback capacitance of the first integrator and the second integrator, an input unit of the D/A converter for feeding back an output of a digital signal, and a subsequent stage of the quantizer function to perform a chopping operation.

10. The delta-sigma modulation type A/D converter according to claim 9 , wherein:
only the chopping operation of the subsequent stage of an output unit of the quantizer is delayed by one A/D conversion timing than the input unit, the preceding stage and the subsequent stage of the feedback capacitance of the first integrator and the second integrator, and the input unit of the D/A converter.

Assignees

• Denso Corp
• Toyota Motor Co Ltd
• MIRISE Technologies Corporation

Inventors

• Makinwa Kofi Afolabi Anthony
• Tang Zhong

Classifications

• H03M3/02

  Delta modulation, i.e. one-bit differential modulation {(H03M3/30 takes precedence)} · CPC title

• H03M3/496 Primary

  Details of sampling arrangements or methods · CPC title

• H03M3/424

  the quantiser being a multiple bit one · CPC title

• H03M3/322

  Continuously compensating for, or preventing, undesired influence of physical parameters (periodically, e.g. by using stored correction values, H03M3/378) · CPC title

• H03M3/356

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M3/494) · CPC title