Semiconductor device

Patent metadata

Field	Value
Publication number	US-12095461-B2
Application number	US-202218054978-A
Country	US
Kind code	B2
Filing date	Nov 14, 2022
Priority date	Nov 16, 2021
Publication date	Sep 17, 2024
Grant date	Sep 17, 2024

Abstract

A semiconductor device includes: an arithmetic circuit that repeats an operation related to a cryptographic processing for the predetermined number of rounds; a holding circuit that holds data related to the number of rounds of an operation of the arithmetic circuit; a judgement circuit that determines whether the number of rounds is the predetermined number of rounds; and an output buffer circuit that outputs the arithmetic result data of the arithmetic circuit when the judgement circuit determines that the number of rounds is the predetermined number. It is configured to duplicate the holding circuit, and not to output the arithmetic result data when two outputs of the duplicated holding circuit are not matched.

First claim

What is claimed is:

1. A semiconductor device comprising:
an arithmetic circuit repeating an operation related to a cryptographic processing for a predetermined number of rounds;
a holding circuit holding data related to the number of rounds of the operation of the arithmetic circuit;
a judgement circuit determining whether the number of rounds is the predetermined number of rounds; and
an output buffer circuit outputting arithmetic result data of the arithmetic circuit when the judgement circuit determines that the number of rounds is the predetermined number of rounds,
wherein the semiconductor device is configured:
to duplicate the holding circuit; and
not to output the arithmetic result data when two outputs of the duplicated holding circuit are not matched.

2. The semiconductor device according to claim 1 ,
wherein the semiconductor device is further configured:
to duplicate the judgment circuit; and
not to output the arithmetic result data when two outputs of the duplicated judgement circuit are not matched.

3. The semiconductor device according to claim 2 ,
wherein the semiconductor is further configured:
to duplicate the output buffer circuit; and
not to output the arithmetic result data when two outputs of the duplicated output buffer circuit are not matched.

4. The semiconductor device according to claim 2 ,
wherein the output buffer circuit is configured by a flip-flop circuit having a first enable input terminal and a second enable input terminal,
wherein one output of the duplicated judgment circuit is inputted in the first enable input terminal,
wherein another output of the duplicated judgement circuit is inputted in the second enable input terminal, and
wherein the output buffer circuit is configured to capture the arithmetic result data when an enable condition of the first enable input terminal and the second enable input terminal are satisfied.

5. The semiconductor device according to claim 1 ,
wherein the holding circuit has an increment circuit or a decrement circuit.

6. The semiconductor device according to claim 1 , further comprising a comparison circuit for comparing the two outputs of the duplicated holding circuit.

7. The semiconductor device according to claim 2 , further comprising a comparison circuit for comparing the two outputs of the duplicated judgement circuit.

8. The semiconductor device according to claim 3 , further comprising a comparison circuit for comparing the two outputs of the duplicated output buffer circuit.

9. The semiconductor device according to claim 1 , further comprising an intermediate value holding circuit for holding an intermediate arithmetic result of the arithmetic circuit,
wherein the intermediate value holding circuit is configured to output the arithmetic result data.

Assignees

• Renesas Electronics Corp

Inventors

• Moriyama Daisuke

Classifications

• H03K19/018564

  with at least one differential stage (H03K19/018578 takes precedence) · CPC title

• H03K19/17744

  for input/output signals · CPC title

• H04L2209/12

  Details relating to cryptographic hardware or logic circuitry · CPC title

• G06F21/79

  in semiconductor storage media, e.g. directly-addressable memories · CPC title

• H03K19/17768 Primary

  for security · CPC title