Rc time based locked voltage controlled oscillator

US12095420B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12095420-B2
Application numberUS-202318322077-A
CountryUS
Kind codeB2
Filing dateMay 23, 2023
Priority dateJul 15, 2020
Publication dateSep 17, 2024
Grant dateSep 17, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Circuits and processes for locking a voltage-controlled oscillator (VCO) at a high frequency signal are described. A circuit may include a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal, a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a switch, and a digital-to-analog converter coupled to the voltage-controlled oscillator where the control signal is generated based on an output of the digital-to-analog converter.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit, comprising: a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal; a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a switch, the dummy load being configured to dissipate energy in the control signal when the voltage-controlled oscillator is in an OFF state; and a digital-to-analog converter coupled to the voltage-controlled oscillator, the control signal being generated based on an output of the digital-to-analog converter. 2. The circuit of claim 1 , wherein the output of the digital-to-analog converter is an adjustment signal. 3. The circuit of claim 1 , further comprising: a digital filter coupled to the voltage-controlled oscillator and configured to receive the high frequency signal, the digital-to-analog converter configured to output an adjustment signal based on a data signal from the digital filter. 4. A circuit, comprising: a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal: a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a first switch; a digital-to-analog converter coupled to the voltage-controlled oscillator, the control signal being generated based on an output of the digital-to-analog converter; and a second switch disposed between the voltage-controlled oscillator and the digital-to-analog converter. 5. The circuit of claim 4 , wherein the voltage-controlled oscillator is switchably coupled within a timing circuit. 6. A circuit, comprising: a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal; a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a switch; and a digital-to-analog converter coupled to the voltage-controlled oscillator, the control signal being generated based on an output of the digital-to-analog converter, the voltage-controlled oscillator being switchably coupled within a feedback loop with the digital-to-analog converter. 7. The circuit of claim 6 , further comprising: an adjustable current converter coupled, at an input terminal, to a power source and configured to generate the control signal, the adjustable current converter configured to adjust the control signal based on an adjustment signal received from the digital-to-analog converter. 8. The circuit of claim 1 , wherein the voltage-controlled oscillator is included in a timing circuit, and is configured to output the high frequency signal while the timing circuit is enabled. 9. An apparatus, comprising: a voltage-controlled oscillator included in a timing circuit and configured to generate a high frequency signal based on a control signal; a dummy load switchably coupled within the timing circuit; and a digital-to-analog converter coupled to the voltage-controlled oscillator and configured to cause an adjustment of the control signal, the voltage-controlled oscillator having an impedance substantially equal to an impedance of the dummy load. 10. The apparatus of claim 9 , wherein the voltage-controlled oscillator is switchably coupled within a feedback loop with the digital-to-analog converter. 11. An apparatus, comprising: a voltage-controlled oscillator included in a timing circuit and configured to generate a high frequency signal based on a control signal; a dummy load switchably coupled within the timing circuit; a digital-to-analog converter coupled to the voltage-controlled oscillator and configured to cause an adjustment of the control signal; and a digital filter configured to transmit a switching signal to the voltage-controlled oscillator and the dummy load. 12. The apparatus of claim 11 , wherein the voltage-controlled oscillator is configured to provide a voltage-controlled oscillator impedance to the control signal while the dummy load is configured to provide a dummy load impedance to the control signal. 13. The apparatus of claim 9 , further comprising: a digital filter coupled to the voltage-controlled oscillator and configured to receive the high frequency signal, the digital filter including: a ripple counter configured to receive the high frequency signal; and a logic control circuit configured to output a switching signal that drives the voltage-controlled oscillator and the dummy load. 14. The apparatus of claim 9 , wherein the voltage-controlled oscillator is configured to generate the high frequency signal with a specified period. 15. The apparatus of claim 9 , wherein digital filter is configured to: divide the high frequency signal to generate a low frequency signal; count a number of pulses in the low frequency signal until an overflow condition is satisfied; and output an overflow signal to a logic control circuit in response to the overflow condition being satisfied. 16. A method, comprising: enabling a voltage-controlled oscillator within a timing circuit to receive a control signal, the voltage-controlled oscillator configured to generate a high frequency signal based on the control signal; switchably disconnecting a dummy load within the timing circuit such that the dummy load is isolated from the control signal; adjusting the control signal using a digital-to-analog converter coupled to the voltage-controlled oscillator; switchably disconnecting the voltage-controlled oscillator such that the voltage-controlled oscillator is isolated from the control signal; and enabling the dummy load to receive the control signal such that the dummy load dissipates energy in the control signal. 17. The method of claim 16 , further comprising: modifying, by the voltage-controlled oscillator, a center frequency of the high frequency signal in response to the adjusting the control signal.

Assignees

Inventors

Classifications

  • Automatic control of frequency or phase; Synchronisation · CPC title

  • having means for achieving a desired tuning characteristic, e.g. linearising the frequency characteristic across the tuning voltage range · CPC title

  • the parameter being a bias voltage or a power supply · CPC title

  • the frequency being controlled by a control current, i.e. current controlled oscillators · CPC title

  • Changing the frequency (modulating pulses H03K7/00; frequency dividers H03K21/00 - H03K29/00; additive or subtractive mixing of two pulse rates into one G06F7/605; pulse rate dividers G06F7/68) · CPC title

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What does patent US12095420B2 cover?
Circuits and processes for locking a voltage-controlled oscillator (VCO) at a high frequency signal are described. A circuit may include a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal, a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a switch, and a digital-to-analog converter co…
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H03K5/00006. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 17 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).