Oscillator circuit

Patent metadata

Field	Value
Publication number	US-2020366241-A1
Application number	US-202016876500-A
Country	US
Kind code	A1
Filing date	May 18, 2020
Priority date	May 17, 2019
Publication date	Nov 19, 2020
Grant date	—

Abstract

A variable-frequency oscillator generates an oscillator clock having a frequency that corresponds to a control signal. A programmable frequency divider divides the oscillator clock, so as to generate a divided clock. A F/V converter circuit includes a capacitor and a switch that switches at a frequency that corresponds to the divided clock, and generates a detection voltage that corresponds to a reference current. A reference voltage source outputs a reference voltage that corresponds to the electric potential that occurs at the resistor due to a reference current. A feedback circuit adjusts a control signal such that the detection voltage approaches the reference voltage. A correction circuit changes the frequency-dividing ratio of the programmable frequency divider based on a modulation signal modulated according to a correction coefficient that corresponds to the temperature.

First claim

What is claimed is:

1 . An oscillator circuit comprising:
a variable-frequency oscillator structured to generate an oscillator clock having a frequency that corresponds to a control signal; a programmable frequency divider structured to divide the oscillator clock so as to generate a divided clock; a F/V (frequency/voltage) converter circuit comprising a capacitor and a switch structured to switch at a frequency that corresponds to the divided clock, and structured to generate a detection voltage that corresponds to a reference current; a reference voltage source comprising a resistor, and structured to output a reference voltage that corresponds to an electric potential that occurs across the resistor due to the reference current; a feedback circuit having low-pass filter characteristics that adjusts the control signal such that the detection voltage approaches the reference voltage; a temperature sensor structured to detect a temperature; and a correction circuit structured to change a frequency-dividing ratio to be set for the programmable frequency divider, based on a modulation signal modulated according to a correction coefficient that corresponds to the temperature.

2 . The oscillator circuit according to claim 1 , wherein the correction circuit comprises:
a calculation unit structured to output the correction coefficient that corresponds to the temperature; and a delta-sigma modulator structured to modulate the correction coefficient.

3 . The oscillator circuit according to claim 2 , wherein the feedback circuit comprises a clocked comparator structured to compare the detection voltage with the reference voltage, and a filter circuit,
wherein the F/V converter circuit comprises an initialization switch coupled in parallel with the capacitor, and structured to charge or discharge the capacitor using the reference current, so as to generate the detection voltage, wherein the oscillator circuit further comprises a timing generator including a fixed frequency divider structured to divide the divided clock, and structured to generate a timing signal for controlling the initialization switch and the clocked comparator, and wherein a combination of the programmable frequency divider, the fixed frequency divider of the timing generator, and the delta-sigma modulator is configured to operate as a pulse swallow counter.

4 . The oscillator circuit according to claim 2 , wherein the calculation unit is structured to calculate the correction coefficient in the form of a polynomial expression with the temperature as a variable.

5 . The oscillator circuit according to claim 4 , wherein the polynomial expression is configured as a quadratic expression.

6 . The oscillator circuit according to claim 2 , wherein the low-pass filter of the feedback circuit has an order that is equal to or higher than that of the delta-sigma modulator.

7 . The oscillator circuit according to claim 1 , further comprising a FLL (Frequency Locked Loop) circuit structured to change the correction coefficient such that the frequency of the oscillator clock approaches a frequency of a reference clock input from an external circuit.

8 . The oscillator circuit according to claim 7 , wherein the FLL circuit is operated at a plurality of temperatures in the calibration mode,
and wherein a parameter for the correction circuit is acquired based on a plurality of temperature coefficients acquired at the plurality of temperatures.

9 . The oscillator circuit according to claim 7 , wherein the capacitor includes a variable capacitance that can be controlled according to a control code,
and wherein an output of the FLL circuit can be employed as the control code.

10 . The oscillator circuit according to claim 3 , further comprising a path selector structured to switch a path through which the reference current passes, between a first path and a second path in a time sharing manner,
wherein the capacitor of the F/V circuit is coupled to the first path, and wherein the resistor of the reference voltage source is coupled to the second path.

11 . A semiconductor apparatus comprising:
the oscillator circuit according to claim 1 ; and a circuit block structured to receive a clock generated by the oscillator circuit.

12 . An oscillator IC (Integrated Circuit) comprising the oscillator circuit according to claim 1 .

13 . A calibration method for an oscillator circuit, wherein the oscillator circuit comprises:
a variable-frequency oscillator structured to generate an oscillator clock having a frequency that corresponds to a control signal; a programmable frequency divider structured to divide the oscillator clock so as to generate a divided clock; a F/V (frequency/voltage) converter circuit comprising a capacitor and a switch structured to switch at a frequency that corresponds to the divided clock, and structured to generate a detection voltage that corresponds to a reference current; a reference voltage source comprising a resistor, and structured to output a reference voltage that corresponds to an electric potential that occurs across the resistor due to the reference current; a feedback circuit structured to adjust the control signal such that the detection voltage approaches the reference voltage; a FLL (Frequency Locked Loop) circuit structured to change an output value thereof such that the frequency of the oscillator clock approaches a frequency of a reference clock input from an external circuit; a temperature sensor structured to detect a temperature; a calculation unit structured to output a correction coefficient that corresponds to the temperature; a delta-sigma modulator structured to generate a modulation signal modulated according to an input signal, and to change a frequency-dividing ratio of the programmable frequency divider; and a selector structured to select one from among the correction coefficient and an output of the FLL circuit, and wherein the calibration method comprises:
selecting, by the selector, the output of the FLL circuit;
operating the oscillator circuit at a plurality of temperatures;
setting the FLL circuit to an active state at the plurality of temperatures, and acquiring the output value of the FLL circuit in a frequency-locked state; and
acquiring a parameter for the calculation unit based on the output values of the FLL circuit acquired at the plurality of temperatures.

14 . The calibration method according to claim 13 , wherein the capacitor includes a variable capacitance that can be controlled according to a control code,
wherein the oscillator circuit is structured to use the output of the FLL circuit as the control code, wherein the calibration method further comprises:
acquiring the output value of the FLL circuit at a standard temperature in a frequency-locked state in which an output of the FLL circuit is coupled to the variable capacitance so as to fix the frequency-dividing ratio of the programmable frequency-dividing ratio to a reference value thereof; and
storing the output value in a nonvolatile manner as the control code to be supplied to the variable capacitance.

Assignees

• Rohm Co Ltd

Inventors

• Tsuji Masanobu

Classifications

• H03L7/099

  concerning mainly the controlled oscillator of the loop · CPC title

• H03B5/04 Primary

  Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature · CPC title

• H03L1/022 Primary

  by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature (H03L1/021 takes precedence) · CPC title

• H03L7/097

  using a comparator for comparing the voltages obtained from two frequency to voltage converters · CPC title

• H03L7/091

  the phase or frequency detector using a sampling device (H03L7/087 takes precedence) · CPC title