Method for producing an optoelectronic device comprising microLEDs

Patent metadata

Field	Value
Publication number	US-12080824-B2
Application number	US-202117645523-A
Country	US
Kind code	B2
Filing date	Dec 22, 2021
Priority date	Dec 22, 2020
Publication date	Sep 3, 2024
Grant date	Sep 3, 2024

Abstract

A method for producing an optoelectronic device having nitride-based microLEDs includes providing an assembly having at least one growth substrate and a nitride structure, where the nitride structure has a semipolar nitride layer that includes an active stack and crystallites extending from facets of the growth substrate with a crystalline orientation {111} to the first face of the semipolar nitride layer and providing an integrated control circuit featuring electric connection pads. The assembly is placed on the integrated control circuit, the growth substrate and the crystallites are removed, and trenches are formed in the stack so as to delimit a plurality of islets, each islet being configured to form a microLED.

First claim

The invention claimed is:

1. A method for producing an optoelectronic device comprising nitride-based micro light-emitting diodes (microLEDs), comprising:
a) providing an assembly comprising at least:
a growth substrate comprising at least one crystalline layer, the crystalline layer comprising a plurality of parallel grooves, each groove comprising at least two angled facets arranged opposite one another, each facet forming a continuous strip, at least one of said two opposite facets featuring a crystalline orientation {111};
a nitride structure made at least partially of nitride obtained from at least one element among gallium, indium, and aluminium, the nitride structure comprising:
a semipolar layer of nitride, featuring a first face turned towards the crystalline layer, the semipolar nitride layer including a stack comprising at least first and second semiconducting layers doped with opposite conductivity types, and
crystallites extending from said facets having a crystalline orientation {111} to the first face of the semipolar nitride layer,

b) providing a control circuit featuring a front face that includes or is electrically connected to a plurality of electric connection pads,
c) placing the assembly on the front face of the control circuit, so that the second layer of the stack is electrically connected to the electric connection pads of the control circuit,
d) removing the growth substrate by separating the crystallites ( 161 ) from the facets featuring a crystalline orientation {111},
e) removing the crystallites, and
f) forming trenches in the stack so as to delimit a plurality of islets, each islet being configured to form a microLED and being connected to at least one electric connection pad of the control circuit.

2. The method according to claim 1 , wherein the facets having a crystalline orientation {111} have a width and the grooves are arranged periodically according to a period P, a ratio P/width being such that P/width≥3, the width being measured from a summit of the grooves to a bottom of the grooves and along a direction perpendicular to a main direction of extension of the grooves.

3. The method according to claim 1 , wherein the step d) of removing the growth substrate comprises application of a mechanical action on at least one among the growth substrate and the nitride structure, the application of a mechanical action comprising initiation of a fracture from an edge of one among the growth substrate and the nitride structure using a blunt object.

4. The method according to claim 1 , wherein the semipolar nitride layer comprises alternating first zones and second zones forming strips or lines that are parallel with the grooves, the first zones having first dislocation densities D 1 and the second zones having second dislocation densities D 2 , with D 1 >K 1 *D 2 , with K 1 >10.

5. The method according to claim 4 , wherein the second zones are arranged periodically in the semipolar nitride layer, on a second face opposite the first face, following a period, and the electric connection pads are arranged so that a majority of the second zones are respectively located opposite a single electric connection pad.

6. The method according to claim 4 , wherein a distribution of the first zones is configured so that the first zones are removed by the step f) of forming the trenches.

7. The method according to claim 4 , wherein the electric connection pads are separated from one another by electrically insulating regions, the first zones being arranged opposite the electrically insulating regions.

8. The method according to claim 4 , wherein the electric connection pads are distributed periodically following a period P 1 .

9. The method according to claim 8 , wherein the second zones are arranged periodically in the semipolar nitride layer, on a second face opposite the first face, following a period P 2 , and wherein P 2 =X*P 1 , with X ranging from 0.8 to 1.2.

10. The method according to claim 1 , wherein the step e) of removing the crystallites comprises a step of chemical mechanical polishing (CMP).

11. The method according to claim 1 , further including, following the step f) of forming the trenches, a step of deposition, on each microLED, of an electrode on and in contact with the first face of the semipolar nitride layer.

12. The method according to claim 1 , wherein providing the assembly comprises providing the growth substrate and a step of epitaxial growth of the semipolar nitride structure from said facets featuring a crystalline orientation {111}.

13. The method according to claim 12 , wherein the growth substrate comprises a barrier layer whereon the crystalline layer rests while being directly in contact therewith, the barrier layer being configured to allow the epitaxial growth of the semipolar nitride layer from the crystalline layer without epitaxial growth from the barrier layer.

14. The method according to claim 12 , wherein the crystalline layer is silicon-based or made of silicon and the facets are formed by or covered by a crystalline buffer layer, the crystalline buffer layer being made of AlN.

15. The method according to claim 12 , wherein the step of epitaxial growth comprises:
a) a first epitaxial growth of a material based on aluminium nitride (AlN) from the facets having a crystalline orientation {111}; and
b) then at least a second epitaxial growth of a material based on gallium nitride (GaN) from the material based on aluminium nitride (AlN).

16. The method according to claim 5 , wherein a distribution of the first zones is configured so that the first zones are removed by the step f) of forming the trenches.

17. The method according to claim 6 , wherein the electric connection pads are separated from one another by electrically insulating regions, the first zones being arranged opposite the electrically insulating regions.

Assignees

• Commissariat Energie Atomique
• Centre Nat Rech Scient

Inventors

• Feuillet Guy
• Templier François
• Zuniga Perez Jesus
• Vennegues Philippe

Classifications

• H10W90/00

  Package configurations · CPC title

• H10H20/0364

  of interconnections · CPC title

• H10H20/825

  containing nitrogen, e.g. GaN · CPC title

• H10H20/817

  characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous · CPC title

• H10H20/018 Primary

  Bonding of wafers · CPC title