Hybrid micro-driver architectures having time multiplexing for driving displays
US-10650737-B2 · May 12, 2020 · US
US12073771B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12073771-B2 |
| Application number | US-202017290414-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 18, 2020 |
| Priority date | Oct 31, 2019 |
| Publication date | Aug 27, 2024 |
| Grant date | Aug 27, 2024 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A display panel and a driving method thereof, and a display device. The display panel includes a substrate and a plurality of pixel circuits arranged in an array on the substrate, each of the plurality of pixel circuits includes a pixel driving chip and at least one light-emitting element electrically connected to the pixel driving chip, and the pixel driving chip is configured to receive and store a data signal and drive the at least one light-emitting element to emit light according to the data signal.
Opening claim text (preview).
What is claimed is: 1. A display panel, comprising: a substrate and a plurality of pixel circuits arranged in an array on the substrate, wherein each of the plurality of pixel circuits comprises a pixel driving chip and at least one light-emitting element electrically connected to the pixel driving chip, and the pixel driving chip is configured to receive and store a data signal and drive the at least one light-emitting element to emit light according to the data signal; each of the at least one light-emitting element comprises a first electrode and a second electrode; the pixel driving chip comprises a first terminal, a second terminal, and a third terminal, and is configured to control a current flowing through the at least one light-emitting element according to the data signal; the first terminal of the pixel driving chip is connected to a first voltage terminal to receive a first voltage, and the second terminal of the pixel driving chip is connected to the first electrode of the at least one light-emitting element; the pixel circuit comprises a data writing circuit, and the data writing circuit is connected to the pixel driving chip and configured to write the data signal to the pixel driving chip in response to a scan signal; the data writing circuit comprises a data writing transistor; a gate electrode of the data writing transistor is electrically connected to a gate driving circuit through a gate line connected to the data writing transistor to receive the scan signal, a first electrode of the data writing transistor is electrically connected to a data driving circuit through a data line connected to the data writing transistor to receive the data signal, and a second electrode of the data writing transistor is electrically connected to the third terminal of the pixel driving chip; the display panel further comprises: a wiring electrode, on a side of the data writing transistor away from the substrate; and a second voltage line, in a same layer as the wiring electrode, and connected to the second electrode of the at least one light-emitting element to provide a second voltage, wherein the at least one light-emitting element and the pixel driving chip are bound on a side of the wiring electrode away from the substrate, and the first electrode of the at least one light-emitting element is connected to the second terminal of the pixel driving chip through the wiring electrode. 2. The display panel according to claim 1 , further comprising: the gate driving circuit, a plurality of gate lines, the data driving circuit, and a plurality of data lines, which are on the substrate, the gate driving circuit is electrically connected to data writing circuits of a plurality of rows of pixel circuits through the plurality of gate lines, respectively, and is configured to provide a plurality of scan signals to the data writing circuits of the plurality of rows of pixel circuits, respectively; and the data driving circuit is electrically connected to data writing circuits of a plurality of columns of pixel circuits through the plurality of data lines, respectively, and is configured to provide a plurality of data signals to the data writing circuits of the plurality of columns of pixel circuits, respectively. 3. The display panel according to claim 1 , wherein the pixel driving chip comprises one second terminal, and the second terminal is electrically connected to the first electrode of the at least one light-emitting element, or, the at least one light-emitting element comprises a plurality of light-emitting elements, the pixel driving chip comprises a plurality of second terminals, and the plurality of second terminals are electrically connected to first electrodes of the plurality of light-emitting elements in a one-to-one correspondence manner. 4. The display panel according to claim 3 , wherein second electrodes of light-emitting elements of pixel circuits in each row are connected to a same second voltage line to receive the second voltage. 5. The display panel according to claim 3 , wherein a plurality of second voltage lines comprise a plurality of groups of second voltage lines, wherein the plurality of groups of second voltage lines are connected to a plurality of rows of pixel circuits in a one-to-one correspondence manner; and the plurality of light-emitting elements comprise Q light-emitting elements, each group of second voltage lines comprises Q second voltage lines, and a q-th second voltage line of the Q second voltage lines is connected to q-th light-emitting elements respectively electrically connected to respective pixel driving chips of pixel circuits in a corresponding row, wherein q is an integer greater than 0 and less than or equal to Q, and Q is an integer greater than or equal to 1. 6. The display panel according to claim 5 , wherein a voltage control circuit is connected to the plurality of groups of second voltage lines, and is configured to simultaneously or sequentially apply second voltages to the Q second voltage lines in each group of second voltage lines according to a timing sequence of applying currents, which correspond to corresponding data signals, to the Q light-emitting elements, which are connected to the respective pixel driving chips, by the respective pixel driving chips, to drive the Q light-emitting elements to simultaneously or sequentially emit light according to the corresponding data signals. 7. The display panel according to claim 1 , wherein the at least one light-emitting element comprises at least two light-emitting elements, and the at least two light-emitting elements emit light of different colors. 8. The display panel according to claim 1 , wherein the at least one light-emitting element is a sub-millimeter light-emitting diode or a miniature light-emitting diode. 9. The display panel according to claim 1 , further comprising: a connection electrode, wherein the connection electrode is connected to the wiring electrode through a hole, and the connection electrode is in a same layer as the first electrode and the second electrode of the data writing transistor. 10. The display panel according to claim 1 , further comprising: a light shielding layer, wherein the light shielding layer and the wiring electrode are arranged in a same layer, and an orthographic projection of the light shielding layer on the substrate coincides with an orthographic projection of a thin film transistor on the substrate. 11. The display panel according to claim 1 , wherein the display panel further comprises a plurality of second voltage lines that are connected to a plurality rows of pixel circuits in a one-to-one correspondence manner, and the second electrode of the light-emitting element of each row of pixel circuits is connected to a corresponding second voltage line; the display panel is configured to, in a display phase of a (N−1)-th frame of image, store a plurality of data signals which correspond to a N-th frame of image in pixel driving chips of the plurality of pixel circuits, respectively; and the display panel further comprises a voltage control circuit, the voltage control circuit is connected to the plurality of second voltage lines, and is configured to, after the data signals corresponding to light-emitting elements in all of the plurality of rows of pixel circuits of an entirety of the display panel are stored, simultaneously directly apply second voltages to second electrodes of the light-emitting elements of pixel circuits in the plurality of rows of pixel circuits through the plurality of the second voltage lines, so as to drive the light-emitting elements of pixel circuits in all of the plurality of rows of pixel circuits to simultaneo
Power management, e.g. power saving · CPC title
Details of timing specific for flat panels, other than clock recovery · CPC title
Details of a shift registers arranged for use in a driving circuit · CPC title
Layout of electrodes and connections · CPC title
the different display panel areas being distributed in two dimensions, e.g. matrix · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.