Display device

Patent metadata

Field	Value
Publication number	US-9812083-B2
Application number	US-201414514834-A
Country	US
Kind code	B2
Filing date	Oct 15, 2014
Priority date	May 23, 2014
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

A display device includes a substrate, display units, and a plurality of integrated circuits (ICs). The substrate includes an active area and a non-active area. The non-active area is located around the active area. The display units are disposed in the active area of the substrate, and arranged in a matrix. The ICs are disposed in the active area of the substrate, arranged in a matrix, and are electrically coupled to the display units. Each of the ICs includes a shift register unit. Each of the shift register units of the ICs is configured to receive a previous-stage scan signal, and generate a current-stage scan signal according to the previous-stage scan signal. The ICs drive the display units according to the current-stage scan signals.

First claim

What is claimed is:

1. A display device comprising:
a substrate comprising an active area and a non-active area, wherein the non-active area is located around the active area;
a plurality of display units disposed in the active area of the substrate and arranged in a matrix; and
a plurality of integrated circuits disposed in the active area of the substrate, arranged in a matrix, and electrically coupled to the display units, wherein each of the integrated circuits comprises a shift register unit, each of the shift register units of the integrated circuits is configured to receive a previous-stage scan signal, and generate a current-stage scan signal according to the previous-stage scan signal, and the integrated circuits drive the display units according to the current-stage scan signals;
wherein each of the integrated circuits corresponds to N corresponding display units among the display units, N is an integer greater than 1, and each of the shift register units of the integrated circuits comprises:
a plurality of sub-shift register units electrically coupled in series, wherein the sub-shift register units are denoted as 1 st to N th sub-shift register units, each of the sub-shift register units is configured to delay a previous-stage sub-scan signal to generate a current-stage sub-scan signal, the 1 st sub-shift register unit uses the previous-stage scan signal as its previous-stage sub-scan signal, each of the 1 st to (N−1) th sub-shift register units transmits the current-stage sub-scan signal to a next sub-shift register unit to serve as the previous-stage sub-scan signal of the next sub-shift register unit, the current-stage sub-scan signal of the N th sub-shift register unit serves as the current-stage scan signal, and each of the sub-shift register units is configured to generate at least one control signal according to the current-stage sub-scan signal; and
N driving circuits, wherein the driving circuits are configured to drive the corresponding display units according to the control signals.

2. The display device as claimed in claim 1 further comprising:
a plurality of scan signal transmission lines disposed on the substrate and electrically coupled between the integrated circuits, wherein the scan signal transmission lines are configured to transmit a plurality of scan signals from a first portion of the integrated circuits arranged along a first direction to a second portion of the integrated circuits arranged along the first direction.

3. The display device as claimed in claim 1 further comprising:
a plurality of data lines disposed on the substrate, wherein the data lines are parallel to each other, and a third portion of the integrated circuits arranged along a second direction are electrically coupled to one of the data lines.

4. The display device as claimed in claim 1 , wherein each of the shift register units of the integrated circuits is configured to receive the previous-stage scan signal, delay the previous-stage scan signal to generate the current-stage scan signal, and generate at least one control signal according to the current-stage scan signal; and
each of the integrated circuits further comprises:
a driving circuit configured to drive a first driving unit among the driving units according to the at least one control signal.

5. The display device as claimed in claim 4 , wherein each of the driving circuit comprises:
a driving transistor configured to generate a driving current flowing through the first driving unit according to a difference between voltage level on a source end and a gate end of the driving transistor.

6. The display device as claimed in claim 4 , wherein each of the shift register units comprises:
a latch configured to receive the previous-stage scan signal, and delay the previous-stage scan signal to generate the current-stage scan signal;
an AND gate configured to perform a logical conjunction on an emitting signal and the current-stage scan signal, so as to generate an AND gate output signal;
an OR gate configured to receive an interrupt signal and the AND gate output signal, and accordingly generate a first control signal among the at least one control signal; and
a NOR gate configured to receive the interrupt signal and the current-stage scan signal, and accordingly generate a second control signal among the at least one control signal.

7. The display device as claimed in claim 4 further comprising:
a plurality of bonding pad sets disposed on the substrate and arranged in a matrix, wherein the integrated circuits are bonded on the bonding pad sets respectively, and each of the bonding pad sets comprises a bonding pad electrically coupled to at least one of the display units among the plurality of display units.

8. The display device as claimed in claim 7 , wherein the integrated circuits and the display units are disposed on a same surface of the substrate.

9. The display device as claimed in claim 1 , wherein the sub-shift register units subsequently generate the control signals, so as to make the driving circuit subsequently drive the corresponding display units according to the control signals.

10. The display device as claimed in claim 1 , wherein each of the sub-shift register units comprises:
a latch configured to receive the previous-stage sub-scan signal and a clock signal, and delay the previous-stage sub-scan signal according to the clock signal to generate the current-stage sub-scan signal;
a multiplexer electrically coupled to the latch, configured to receive the clock signal, a compensation signal, and the current-stage sub-scan signal, and selectively output one of the compensation signal and clock signal according to the current-stage sub-scan signal, so as to generate a multiplexer output signal;
an OR gate electrically coupled to the multiplexer, configured to receive an interrupt signal and the multiplexer output signal, and accordingly generate a first control signal among the control signals; and
a NOR gate configured to receive the interrupt signal and the current-stage sub-scan signal, and accordingly generate a second control signal among the control signals;
wherein lengths of time periods when the driving circuits drive the corresponding display units correspond to a duty cycle of the clock signal.

11. The display device as claimed in claim 10 further comprising:
a plurality of bonding pad sets disposed on the substrate and arranged in a matrix, wherein the integrated circuits are bonded on the bonding pad sets respectively, and each of the bonding pad sets comprises a bonding pad electrically coupled to at least one of the display units among the plurality of display units.

12. The display device as claimed in claim 10 , wherein the integrated circuits and the display units are disposed on a same surface of the substrate.

13. The display device as claimed in claim 1 further comprising:
a plurality of bonding pad sets disposed on the substrate and arranged in a matrix, wherein the integrated circuits are bonded on the bonding pad sets respectively, and each of the bonding pad sets comprises a bonding pad electrically coupled to at least one of the display units among the plurality of display units.

14. The display device as claimed in claim 1 , wherein the integrated circuits and the display units are disposed on a same surface of the substrate.

15. A display device comprising:
a substrate comprising an active area and a non-active area, wherein the non-active area is located around the active area;
a plurality of display units disposed in the active area of the substrate and arranged in a matrix; and

Assignees

• Au Optronics Corp

Inventors

• Yen Shao-Wen
• Lee Tsung-Shiun
• Liu Yi-Cheng
• Hsu Sheng-Yu

Classifications

• G09G3/32

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• G09G2300/08

  Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements · CPC title

• G09G3/2088 Primary

  with use of a plurality of processors, each processor controlling a number of individual elements of the matrix · CPC title

• G09G2310/0286

  Details of a shift registers arranged for use in a driving circuit · CPC title

• G09G3/3674 Primary

  Details of drivers for scan electrodes · CPC title