Methods for processing a semiconductor workpiece
US-2015147850-A1 · May 28, 2015 · US
US12060266B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12060266-B2 |
| Application number | US-202117248799-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 8, 2021 |
| Priority date | Feb 13, 2020 |
| Publication date | Aug 13, 2024 |
| Grant date | Aug 13, 2024 |
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A method for producing MEMS components comprises generating a carrier having a plurality of recesses. An adhesive structure is arranged on the carrier and in the recesses. A semiconductor wafer is generated, which has a plurality of MEMS structures arranged at the first main surface of the semiconductor wafer. The adhesive structure is attached to the first main surface of the semiconductor wafer, with the recesses being arranged above the MEMS structures and the adhesive structure not contacting the MEMS structures. The semiconductor wafer is singulated into a plurality of MEMS components by applying a mechanical dicing process.
Opening claim text (preview).
The invention claimed is: 1. A method for producing micro-electromechanical system (MEMS) components, comprising: forming a carrier having a plurality of recesses; arranging an adhesive structure on the carrier and in the plurality of recesses; forming a semiconductor wafer having a plurality of MEMS structures arranged near a first main surface of the semiconductor wafer; attaching the adhesive structure to the first main surface of the semiconductor wafer, with the plurality of recesses being arranged above the plurality of MEMS structures and the adhesive structure not contacting the plurality of MEMS structures; singulation of the semiconductor wafer into a plurality of MEMS components by applying a mechanical dicing process such that the semiconductor wafer has a singulated arrangement corresponding to the plurality of MEMS components; after the singulation of the semiconductor wafer, arranging a second main surface of the semiconductor wafer having the singulated arrangement on a tape-and-frame carrier such that the plurality of MEMS components are arranged on the tape-and-frame carrier, wherein the second main surface is located opposite to the first main surface; after arranging the second main surface of the semiconductor wafer having the singulated arrangement on the tape-and-frame carrier, removing the carrier and the adhesive structure from the plurality of MEMS components using one or more of a heat treatment or a UV treatment of the adhesive structure; and after removing the carrier and the adhesive structure from the plurality of MEMS components: arranging the tape-and-frame carrier with the plurality of MEMS components on a wafer chuck; arranging an edge of the tape-and-frame carrier on a pretension chuck, wherein the pretension chuck is configured to lift the edge of the tape-and-frame carrier relative to an inner region of the tape-and-frame carrier that is coupled to the wafer chuck; and separating an edge region of the semiconductor wafer from the semiconductor wafer such that the edge region of the semiconductor wafer is detached from the tape-and-frame carrier. 2. The method as claimed in claim 1 , wherein the mechanical dicing process is applied at the second main surface of the semiconductor wafer located opposite to the first main surface. 3. The method as claimed in claim 1 , wherein the adhesive structure comprises a double-sided adhesive tape. 4. The method as claimed in claim 3 , wherein the double-sided adhesive tape is heat-soluble or UV-soluble or both. 5. The method as claimed in claim 1 , wherein the adhesive structure is configured as a single part. 6. The method as claimed in claim 1 , wherein the adhesive structure covers base surfaces of the plurality of recesses and sections of the carrier between the plurality of recesses. 7. The method as claimed in claim 1 , wherein the arranging of the adhesive structure on the carrier and in the plurality of recesses comprises: laminating the carrier with the adhesive structure under vacuum. 8. The method as claimed in claim 1 , wherein the mechanical dicing process comprises a sawing process. 9. The method as claimed in claim 1 , wherein one or more of the carrier or the adhesive structure is excluded from the mechanical dicing process, wherein at least the carrier is excluded from the mechanical dicing process. 10. The method as claimed in claim 1 , wherein an edge region of the semiconductor wafer is excluded from the mechanical dicing process. 11. The method as claimed in claim 10 , wherein the edge region is annular in shape and has a width in a range from 2 mm to 10 mm. 12. The method as claimed in claim 1 , wherein the second main surface of the semiconductor wafer is continuously closed. 13. The method as claimed in claim 1 , wherein a thickness of the semiconductor wafer in a direction perpendicular to the first main surface is greater than 600 microns. 14. The method as claimed in claim 1 , wherein a specific electrical resistance of the semiconductor wafer is less than 0.01 Ω·cm. 15. The method as claimed in claim 1 , wherein a kerf width of the semiconductor wafer is less than 240 microns. 16. The method as claimed in claim 1 , wherein a ratio of a kerf width of the semiconductor wafer to a thickness of the semiconductor wafer is less than 0.4. 17. The method as claimed in claim 1 , wherein the carrier is made of one or more of a glass material or a semiconductor material. 18. The method as claimed in claim 1 , wherein the plurality of MEMS structures comprise movable micromirrors. 19. A method for producing micro-electromechanical system (MEMS) components, comprising: arranging an adhesive structure on a main surface of a carrier; forming a semiconductor wafer having a plurality of MEMS structures arranged near a first main surface of the semiconductor wafer; attaching the adhesive structure to the first main surface of the semiconductor wafer, wherein the adhesive structure contacts the MEMS structures; singulation of the semiconductor wafer into a plurality of MEMS components by applying a mechanical dicing process such that the semiconductor wafer has a singulated arrangement that includes the plurality of MEMS components; after the singulation of the semiconductor wafer, arranging a second main surface of the semiconductor wafer having the singulated arrangement on a tape-and-frame carrier such that the plurality of MEMS components are arranged on the tape-and-frame carrier, wherein the second main surface is located opposite to the first main surface; after arranging the second main surface of the semiconductor wafer having the singulated arrangement on the tape-and-frame carrier, removing the carrier and the adhesive structure from the plurality of MEMS components using one or more of a heat treatment or a UV treatment of the adhesive structure; and after removing the carrier and the adhesive structure from the plurality of MEMS components: arranging the tape-and-frame carrier with the plurality of MEMS components on a wafer chuck; arranging an edge of the tape-and-frame carrier on a pretension chuck, wherein the pretension chuck is configured to lift the edge of the tape-and-frame carrier relative to an inner region of the tape-and-frame carrier that is coupled to the wafer chuck; and separating an edge region of the semiconductor wafer from the semiconductor wafer such that the edge region of the semiconductor wafer is detached from the tape-and-frame carrier. 20. The method as claimed in claim 19 , wherein the mechanical dicing process is applied at the second main surface of the semiconductor wafer located opposite to the first main surface. 21. The method as claimed in claim 19 , wherein the main surface of the carrier is substantially planar.
Cavities · CPC title
Depositing a protective layers · CPC title
Arrangement of basic structures like cavities or channels, e.g. suitable for microfluidic systems · CPC title
Micromirrors, not used as optical switches · CPC title
Temporary protection during separation into individual elements · CPC title
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