Assemblies which include wordlines having a first metal-containing material at least partially surrounding a second metal-containing material and having different crystallinity than the second metal-containing material

US12034057B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12034057-B2
Application numberUS-202117496715-A
CountryUS
Kind codeB2
Filing dateOct 7, 2021
Priority dateApr 15, 2019
Publication dateJul 9, 2024
Grant dateJul 9, 2024

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. The wordline levels include conductive regions which have a first metal-containing material and a second metal-containing material. The first metal-containing material at least partially surrounds the second metal-containing material. The first metal-containing material has a different crystallinity than the second metal-containing material. In some embodiments the first metal-containing material is substantially amorphous, and the second metal-containing material has a mean grain size within a range of from greater than or equal to about 5 nm to less than or equal to about 200 nm. Charge-storage regions are adjacent the wordline levels. Charge-blocking regions are between the charge-storage regions and the conductive regions.

First claim

Opening claim text (preview).

We claim: 1. A memory cell, comprising: a conductive gate comprising only two metal-containing materials; the two metal-containing materials comprising a first metal-containing material completely enveloping a core second metal-containing material; the first and core second metal-containing materials differing from one another in crystallinity, with the core second metal-containing material having a larger mean grain size than the first metal-containing material; the first metal-containing material comprising one or more of the following compositions: metal carbides, metal oxides, metal silicides, metal nitrides and metal germides; and a charge-blocking region adjacent the conductive gate; a charge-storage region adjacent the charge-blocking region; and wherein the first and core second metal-containing materials are a same composition as one another. 2. The memory cell of claim 1 wherein the metal within the first metal-containing material comprises one or more of tungsten, tantalum, titanium, ruthenium, molybdenum, cobalt, nickel and aluminum. 3. The memory cell of claim 1 wherein the metal within the core second metal-containing material comprises one or more of tungsten, tantalum, titanium, ruthenium, molybdenum, cobalt, nickel, aluminum, copper, platinum and palladium. 4. The memory cell of claim 1 wherein the metal within the first metal-containing material comprises one or more of tantalum, ruthenium and aluminum. 5. The memory cell of claim 1 wherein the metal within the core second metal-containing material comprises one or more of tantalum, ruthenium and aluminum. 6. The memory cell of claim 1 wherein a total thickness of the conductive gate comprises a range of from about 5 nm to about 50 nm. 7. The memory cell of claim 6 wherein the first metal-containing material comprises a thickness within a range of from about 5% of the total thickness to about 25% of the total thickness. 8. The memory cell of claim 1 wherein a mean grain size of the core second metal-containing material comprises a range of from greater than or equal to about 5 nm to less than or equal to about 200 nm. 9. The memory cell of claim 1 wherein the first metal-containing material comprises a mean grain size of less than or equal to about 10 nm. 10. The memory cell of claim 1 wherein the first metal-containing material comprises a gradient interface with the second metal-containing material; the gradient interface comprising one of the following configurations: as the thickness of the second metal-containing material increases from the first metal-containing material, the percentage of the first metal-containing material decreases and the percentage of the second metal-containing material increases with a majority of the central portion of the second metal-containing material comprising only the second metal-containing material; or as the thickness of the second metal-containing material increases from the first metal-containing material, the percentage of the first metal-containing material decreases and the percentage of the second metal-containing material increases until a peak is reached at the center of the second metal-containing material. 11. A memory cell, comprising: a conductive gate; the conductive gate including a first metal-containing material substantially enveloping a second metal-containing material; the first metal-containing material comprising a gradient interface with the second metal-containing material; the gradient interface comprising one of the following configurations: as the thickness of the second metal-containing material increases from the first metal-containing material, the percentage of the first metal-containing material decreases and the percentage of the second metal-containing material increases with a majority of the central portion of the second metal-containing material comprising only the second metal-containing material; or as the thickness of the second metal-containing material increases from the first metal-containing material, the percentage of the first metal-containing material decreases and the percentage of the second metal-containing material increases until a peak is reached at the center of the second metal-containing material; the first and second metal-containing materials differing from one another in crystallinity, with the second metal-containing material having a larger mean grain size than the first metal-containing material; and a charge-blocking region adjacent the conductive gate; and a charge-storage region adjacent the charge-blocking region. 12. The memory cell of claim 11 wherein the first metal-containing material comprising one or more of the following compositions: metal carbides, metal oxides and metal germides. 13. The memory cell of claim 11 wherein the metal within the first metal-containing material comprises one or more of tungsten, tantalum, titanium, ruthenium, molybdenum, cobalt, nickel and aluminum. 14. The memory cell of claim 11 wherein the metal within the second metal-containing material comprises one or more of tungsten, tantalum, titanium, ruthenium, molybdenum, cobalt, nickel, aluminum, copper, platinum and palladium. 15. The memory cell of claim 11 wherein the metal within the first metal-containing material comprises one or more of tantalum, ruthenium and aluminum. 16. The memory cell of claim 11 wherein the metal within the second metal-containing material comprises one or more of tantalum, ruthenium and aluminum. 17. The memory cell of claim 11 wherein the first and second metal-containing materials are a same composition as one another. 18. The memory cell of claim 11 wherein the first and second metal-containing materials are different compositions relative to one another. 19. The memory cell of claim 11 wherein a total thickness of the conductive gate comprises a range of from about 5 nm to about 50 nm. 20. The memory cell of claim 11 wherein a mean grain size of the second metal-containing material comprises a range of from greater than or equal to about 5 nm to less than or equal to about 200 nm. 21. The memory cell of claim 11 wherein the first metal-containing material comprises a mean grain size of less than or equal to about 10 nm. 22. The memory cell of claim 11 wherein the first metal-containing material and the second metal-containing material are the only two materials forming the conductive gate. 23. The memory cell of claim 22 wherein the first metal-containing material entirely envelopes the second metal-containing material. 24. A memory cell, comprising: a conductive gate; the conductive gate including a first metal-containing material substantially enveloping a second metal-containing material; the first metal-containing material comprising a non-discrete material boundary with the second metal-containing material; the non-discrete material boundary comprising one of the following configurations: as the thickness of the second metal-containing material increases from the first metal-containing material, the percentage of the first metal-containing material decreases and the percentage of the second metal-containing material increases with a majority of the central portion of the second metal-containing material comprising only the second metal-containing material; or as the thickness of the second metal-containing material increases from the first metal-containing material, the percentage of the first metal-containing materi

Assignees

Inventors

Classifications

  • with a cell select transistor, e.g. NAND · CPC title

  • the channels comprising vertical portions, e.g. U-shaped channels · CPC title

  • characterised by the top-view layout · CPC title

  • the channels comprising vertical portions, e.g. U-shaped channels · CPC title

  • characterised by the top-view layout · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12034057B2 cover?
Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. The wordline levels include conductive regions which have a first metal-containing material and a second metal-containing material. The first metal-containing material at least partially surrounds the second metal-containing m…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification H10B43/35. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 09 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).