Printed circuit board

Patent metadata

Field	Value
Publication number	US-12028973-B2
Application number	US-202117501253-A
Country	US
Kind code	B2
Filing date	Oct 14, 2021
Priority date	Jan 5, 2021
Publication date	Jul 2, 2024
Grant date	Jul 2, 2024

Abstract

A printed circuit board includes a first insulating layer, a metal layer disposed on one surface of the first insulating layer, a first circuit layer disposed inside the first insulating layer and having one surface exposed to the one surface of the first insulating layer so as to be in contact with one surface of the metal layer, a second circuit layer in contact with the other surface of the metal layer, and a second insulating layer disposed on the one surface of the first insulating layer to cover the metal layer and the second circuit layer. The first and second circuit layers respectively include a metal different from the metal layer.

First claim

What is claimed is:

1. A printed circuit board comprising:
a first insulating layer;
a metal layer disposed on one surface of the first insulating layer;
a first circuit layer disposed inside the first insulating layer and having one surface exposed to the one surface of the first insulating layer so as to be in contact with one surface of the metal layer;
a second circuit layer having one surface in contact with another surface of the metal layer; and
a second insulating layer disposed on the one surface of the first insulating layer in a stacking direction to cover the metal layer and the second circuit layer,
wherein:
the first and second circuit layers respectively include a metal different from the metal layer,
the first circuit layer has another surface opposite the one surface of the first circuit layer in the stacking direction and the second circuit layer has another surface opposite the one surface of the second circuit layer in the stacking direction,
the metal layer includes a first metal layer disposed to be in contact with the first circuit layer and including a metal different from that of the first and second circuit layers, respectively,
a second metal layer disposed to be in contact with the second circuit layer without covering a side surface of the second circuit layer,
the second metal layer includes a metal different from the first metal layer, and
the first insulating layer covers at least a portion of the another surface of the first circuit layer in the stacking direction or the second insulating layer covers at least a portion of the another surface of the second circuit layer in the stacking direction.

2. The printed circuit board of claim 1 , wherein electrical conductivity of the first and second circuit layers is lower than electrical conductivity of the metal layer.

3. The printed circuit board of claim 1 , wherein the metal layer includes silver (Ag).

4. The printed circuit board of claim 1 , wherein the first and second circuit layers respectively include copper (Cu).

5. The printed circuit board of claim 1 , wherein electrical conductivity of the second metal layer is lower than electrical conductivity of the first metal layer.

6. The printed circuit board of claim 1 , wherein the second metal layer includes copper (Cu).

7. The printed circuit board of claim 1 , wherein a thickness of the second metal layer is 5 μm or less.

8. The printed circuit board of claim 1 , wherein the one surface of the first circuit layer and the one surface of the first insulating layer are disposed at the same level.

9. The printed circuit board of claim 1 , wherein the metal layer includes at least one of titanium (Ti) or tin (Sn).

10. The printed circuit board of claim 1 , wherein a thickness of the metal layer is 10 nm or more and 400 nm or less.

11. The printed circuit board of claim 1 , further comprising:
a build-up circuit layer disposed on at least one of the first insulating layer or the second insulating layer; and
a via passing through at least one of the first insulating layer or the second insulating layer to connect the build-up circuit layer to at least one of the first or second circuit layers.

12. The printed circuit board of claim 1 , wherein the second insulating layer covers a side surface of the metal layer so that the metal layer is embedded in the second insulating layer.

13. The printed circuit board of claim 1 , wherein entirety of at least one of the first circuit layer or the second circuit layer, and the metal layer, have widths that are substantially the same as that of an interface therebetween.

14. A printed circuit board comprising:
an insulating body including a stacked metal structure including a first copper layer, a second copper layer, and a metal layer disposed between the first copper layer and the second copper layer, the insulating body including a first insulating layer and a second insulating layer disposed on the first insulating layer in a stacking direction,
wherein the second insulating layer covers at least a side surface of the metal layer,
wherein the metal layer includes a first metal layer disposed to be in contact with the first circuit layer and including a metal different from that of the first and second circuit layers, respectively, and a second metal layer disposed to be in contact with the second circuit layer without covering a side surface of the second circuit layer,
wherein the second metal layer includes a metal different from the first metal layer, and
wherein entirety of at least one of the first copper layer or the second copper layer, and the metal layer, have widths that are substantially the same as that of an interface therebetween.

15. The printed circuit board of claim 14 , wherein the metal layer includes one of silver (Ag), titanium (Ti), or tin (Sn).

16. The printed circuit board of claim 14 , wherein the metal layer is in contact with the first copper layer and the second copper layer.

17. The printed circuit board of claim 16 , wherein a thickness of the metal layer is less than a thickness of the first copper layer and a thickness of the second copper layer.

18. The printed circuit board of claim 14 , further comprising a third copper layer disposed between the metal layer and the second copper layer.

19. The printed circuit board of claim 18 , wherein the metal layer is in contact with the first copper layer and the third copper layer, and
the second copper layer is in contact with the third copper layer.

20. The printed circuit board of claim 18 , wherein a sum of thicknesses of the metal layer and the third copper layer is less than a thickness of the first copper layer and a thickness of the second copper layer.

Assignees

• Samsung Electro Mech

Inventors

• Park Chan Jin
• Cho Young Ook
• Yang Hyun Seok
• Sim Ki Joo
• Lee Won Seok
• Jeon Mi Jeong

Classifications

• H05K1/11

  Printed elements for providing electric connections to or between printed circuits · CPC title

• H05K1/09 Primary

  Use of materials for the {conductive, e.g. } metallic pattern · CPC title

• H05K1/115

  Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

• H05K3/4644

  by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602) · CPC title

• H05K1/0298 Primary

  Multilayer circuits · CPC title