Controlled wetting and spreading of metals on substrates using porous interlayers and related articles

Patent metadata

Field	Value
Publication number	US-12022610-B2
Application number	US-202217668660-A
Country	US
Kind code	B2
Filing date	Feb 10, 2022
Priority date	Apr 17, 2018
Publication date	Jun 25, 2024
Grant date	Jun 25, 2024

Abstract

The disclosure generally relates to a method of creating patterned metallic circuits (e.g., silver circuits) on a substrate (e.g., a ceramic substrate). A porous metal interlayer (e.g., porous nickel) is applied to the substrate to improve wetting and adhesion of the patterned metal circuit material to the substrate. The substrate is heated to a temperature sufficient to melt the patterned metal circuit material but not the porous metal interlayer. Spreading of molten metal circuit material on the substrate is controlled by the porous metal interlayer, which can itself be patterned, such as having a defined circuit pattern. Thick-film silver or other metal circuits can be custom designed in complicated shapes for high temperature/high power applications. The materials designated for the circuit design allows for a low-cost method of generating silver circuits other metal circuits on a ceramic substrate.

First claim

What is claimed is:

1. A patterned, wetted substrate comprising:
(a) a substrate;
(b) a bulk patterned second metal layer adjacent to the substrate, the bulk patterned second metal layer comprising a second metal and a first metal, the first metal being at a lower concentration than the second metal in the bulk patterned second metal layer; and
(c) an interfacial layer between the bulk patterned second metal layer and the substrate, the interfacial layer comprising the first metal and the second metal;
wherein:
the second metal has a lower melting point than that of the first metal;
the interfacial layer comprises porous portions of the first metal defining pores therein, the pores ranging in size from 0.005 μm to 50 μm;
the pores of the porous portions contain the second metal infiltrated therein, the second metal infiltrated in the pores ranging in size from 0.005 μm to 50 μm;
the second metal is bonded to and is in contact with the substrate via the porous portions of the first metal in the interfacial layer;
the interfacial layer has a thickness in a range of 0.01 μm to 250 μm; and
the bulk patterned second metal layer and the interfacial layer have a combined thickness in a range of 0.1 μm to 1000 μm.

2. The patterned, wetted substrate of claim 1 , further comprising one or more electronic components mounted to the patterned, wetted substrate in electrical connection to an element of the bulk patterned second metal layer;
wherein the bulk patterned second metal layer has a spatial pattern corresponding to electronic circuitry, and the interfacial layer has the same spatial pattern as the bulk patterned second metal layer.

3. The patterned, wetted substrate of claim 1 , wherein the bulk patterned second metal layer has a first metal concentration of 20 wt. % or less; and
the interfacial layer has a first metal concentration of at least 10 wt. % and greater than the first metal concentration of the bulk patterned second metal layer.

4. The patterned, wetted substrate of claim 1 , wherein the bulk patterned second metal layer has a second metal concentration ranging from 70 wt. % to 99 wt. %.

5. The patterned, wetted substrate of claim 1 , wherein the bulk patterned second metal layer is free from discrete first metal particles having a size greater than 1 μm.

6. The patterned, wetted substrate of claim 1 , wherein:
the first metal comprises at least one of nickel, aluminum, cobalt, iron, copper, titanium and combinations thereof; and
the second metal comprises at least one of silver, aluminum, tin, bismuth, nickel, copper, gold, cobalt, and combinations thereof.

7. The patterned, wetted substrate of claim 1 , wherein the second metal comprises silver.

8. The patterned, wetted substrate of claim 1 , wherein: the substrate comprises a ceramic material.

9. The patterned, wetted substrate of claim 8 , wherein the ceramic material is selected from the group consisting of aluminum oxide, aluminum nitride, gallium nitride, aluminum gallium nitride, beryllium oxide, zirconium oxide, cerium oxide, zinc oxide, silicon carbide, silicon nitride, tungsten carbide, doped derivatives thereof, and combinations thereof.

10. The patterned, wetted substrate of claim 8 , wherein the ceramic material comprises one or more of aluminum oxide (alumina), aluminum nitride, gallium nitride, aluminum gallium nitride, aluminum gallium indium nitride, beryllium oxide, silicon carbide and silicon nitride.

11. The patterned, wetted substrate of claim 8 , wherein the ceramic material comprises a stabilized zirconium oxide (zirconia).

12. The patterned, wetted substrate of claim 8 , wherein the ceramic material comprises one or more of lanthanum strontrium manganite, lanthanum strontium cobaltite, and lanthanum strontium ferrite.

13. The patterned, wetted substrate of claim 1 , wherein the substrate comprises one or more of a metal material and a semiconductor material.

14. The patterned, wetted substrate of claim 1 , wherein the substrate comprises a stainless steel alloy.

15. The patterned, wetted substrate of claim 1 , wherein the substrate comprises a nickel-based high temperature alloy.

16. The patterned, wetted substrate of claim 1 , wherein the melting point of the second metal is lower than the melting point of the first metal by at least 300° C.

17. The patterned, wetted substrate of claim 1 , wherein the melting point of the second metal is lower than the melting point of the first metal by 300° C. to 700° C.

18. The patterned, wetted substrate of claim 1 , wherein the melting point of the second metal is lower than the melting point of the first metal by 700° C. to 1000° C.

19. The patterned, wetted substrate of claim 1 , wherein:
the bulk patterned second metal layer has a first metal concentration of 20 wt. % or less;
the interfacial layer has a first metal concentration of at least 10 wt. % and greater than the first metal concentration of the bulk patterned second metal layer;
the bulk patterned second metal layer has a second metal concentration ranging from 70 wt. % to 99 wt. %;
the first metal comprises at least one of nickel, aluminum, cobalt, iron, copper, titanium and combinations thereof; and
the second metal comprises at least one of silver, aluminum, tin, bismuth, nickel, copper, gold, cobalt, and combinations thereof.

20. The patterned, wetted substrate of claim 19 , wherein the melting point of the second metal is lower than the melting point of the first metal by 300° C. to 1000° C.

Assignees

• Univ Michigan State

Inventors

• Nicholas Jason Dale
• Zhou Quan
• Bieler Thomas Rector

Classifications

• H05K3/1208

  Pretreatment of the circuit board, e.g. modifying wetting properties; Patterning by using affinity patterns (providing shape patterns H05K3/1258; adhesion treatments H05K3/38) · CPC title

• H05K3/3478

  Application of solder preforms; Transferring prefabricated solder patterns · CPC title

• H05K3/22

  Secondary treatment of printed circuits {(H05K3/1283 takes precedence; embedding circuits in grooves by pressure H05K3/107)} · CPC title

• H05K2203/1147

  Sealing or impregnating, e.g. of pores · CPC title

• H05K1/0306 Primary

  Inorganic insulating substrates, e.g. ceramic, glass · CPC title