High temporal resolution solid-state X-ray detection system

Patent metadata

Field	Value
Publication number	US-12015036-B2
Application number	US-202117241594-A
Country	US
Kind code	B2
Filing date	Apr 27, 2021
Priority date	Apr 28, 2020
Publication date	Jun 18, 2024
Grant date	Jun 18, 2024

Abstract

Devices, systems and methods for solid-state X-ray detection with high temporal resolution are described. An example method includes receiving an X-ray pulse in a semiconductor chip resulting in an electron cloud being formed in the semiconductor chip, applying a first set of voltages across a first plurality of drift cathode strips on a first side of the semiconductor chip and a second plurality of drift cathode strips on a second side of the semiconductor chip, applying a second set of voltages to across the first and the second plurality of drift cathode strips to form an electric field having a linear profile to cause the electron cloud to drift along the middle of the semiconductor chip, and activating a counter cathode on the second side and one or more readout anodes on the first side to collect the electron cloud after spreading in the middle section of the semiconductor chip.

First claim

What is claimed is:

1. An X-ray pulse detection system, comprising:
a semiconductor chip comprising a bulk material;
a first plurality of drift cathode strips on a first side of the semiconductor chip;
a second plurality of drift cathode strips on a second side of the semiconductor chip, wherein each of the first plurality and the second plurality of drift cathode strips are doped with a p-type dopant;
a plurality of readout anodes positioned on the first side, wherein each of the plurality of readout anodes is doped with an n-type dopant; and
a counter cathode positioned on the second side,
wherein the first plurality and the second plurality of drift cathode strips are configured to create a potential well in a middle section of the semiconductor chip and cause an electron cloud, generated by an X-ray pulse being incident on the semiconductor chip, to drift in a first direction towards the middle section of the semiconductor chip,
wherein the first and the second plurality of drift cathodes are configured to further create a linearly graded potential along a length of the semiconductor chip and to cause the electron cloud to drift in a second direction that is substantially perpendicular to the first direction,
wherein the plurality of readout anodes are configured to collect the electron cloud after its spreading in the middle section of the semiconductor chip, and
wherein values for a thickness of the semiconductor chip, a number of the first plurality and the second plurality of drift cathode strips, and a bias voltage applied to the first and the second plurality of drift cathode strips are selected to obtain a predetermined temporal resolution for X-ray pulses within a particular range of energies, wherein a value for the thickness of the semiconductor chip is selected from a range spanning 0.01 μm to 1000 μm, wherein a value of the number of the first plurality and the second plurality of drift cathode strips is selected from a range spanning 1 to 50, wherein a value for the bias voltage is selected from a range spanning 0V to 12V, and wherein the particular range of energies spans 1 keV to 1000 keV.

2. The X-ray pulse detection system of claim 1 , further comprising:
a voltage divider network comprising a serpentine structure, wherein creating the linearly graded potential is further based on the voltage divider network.

3. The X-ray pulse detection system of claim 1 , further comprising:
a guard ring surrounding the semiconductor chip to prevent stray leakage from outside the semiconductor chip from interfering with the electron cloud.

4. The X-ray pulse detection system of claim 3 , further comprising:
a first guard strip, parallel and adjacent to the plurality of readout anodes on a first edge, to prevent a leakage current from being read by the plurality of readout anodes; and
a second guard strip, parallel and adjacent to a last drift cathode strip on a second edge opposite from the first edge, to prevent electronic coupling between the guard ring and the last drift cathode strip.

5. The X-ray pulse detection system of claim 1 , wherein the bulk material comprises silicon, and wherein the p-type dopant is boron and the n-type dopant is phosphorous.

6. The X-ray pulse detection system of claim 1 , wherein the bulk material comprises germanium.

7. The X-ray pulse detection system of claim 1 , further comprising:
an X-ray source to generate the X-ray pulse that is incident on the semiconductor chip.

8. The X-ray pulse detection system of claim 1 , wherein the values are selected based on a physics-based model that describes a drift velocity of the electron cloud for varying values of the bias voltage.

9. The X-ray pulse detection system of claim 8 , wherein the physics-based model further describes a drift time limit for varying values of the thickness of the semiconductor chip.

10. A device chip for solid-state X-ray detection, comprising:
a series of boron-doped drift cathode strips mirrored on a front and a back of the device chip;
a column of phosphorus-doped readout anodes on the front of the device chip; and
a boron-doped counter cathode on the back of the device chip,
wherein values for a thickness of the device chip, a number of the series of boron-doped drift cathode strips mirrored on the front and the back of the device chip, and a bias voltage applied to the series of boron-doped drift cathode strips are selected to obtain a predetermined temporal resolution for X-ray pulses within a particular range of energies, wherein a value for the thickness of the device chip is selected from a range spanning 0.01 μm to 1000 μm, wherein a value of the number of the series of boron-doped drift cathode strips is selected from a range spanning 1 to 50, wherein a value for the bias voltage is selected from a range spanning 0V to 12V, and wherein the particular range of energies spans 1 keV to 1000 keV.

11. The device chip of claim 10 , wherein the device chip is configured to spread a charge generated by a 25 ns X-ray pulse and achieve a 30 μm spatial resolution and a 30 ps temporal resolution.

12. The device chip of claim 11 , further comprising:
one or more charge integrating amplifiers coupled to the column of phosphorous-doped readout anodes.

13. A method for solid-state X-ray detection with a high temporal resolution, comprising:
receiving an X-ray pulse in a semiconductor chip comprising a bulk material resulting in an electron cloud being formed in the semiconductor chip;
applying a first set of voltages across a first plurality of drift cathode strips on a first side of the semiconductor chip and a second plurality of drift cathode strips on a second side of the semiconductor chip, wherein each of the first plurality and the second plurality of drift cathode strips are doped with a p-type dopant, and wherein setting the first set of voltages causes the electron cloud to migrate to a middle section of the semiconductor chip;
applying a second set of voltages to across the first and the second plurality of drift cathode strips to form an electric field having a linear profile to cause the electron cloud to drift along the middle of the semiconductor chip; and
activating a counter cathode on the second side and one or more readout anodes on the first side to collect the electron cloud after spreading in the middle section of the semiconductor chip, wherein each of the one or more readout anodes is doped with an n-type dopant,
wherein values for a thickness of the semiconductor chip, a number of the first plurality and the second plurality of drift cathode strips, and a bias voltage applied to the first and the second plurality of drift cathode strips are selected to obtain a predetermined temporal resolution for X-ray pulses within a particular range of energies, wherein a value for the thickness of the semiconductor chip is selected from a range spanning 0.01 μm to 1000 μm, wherein a value of the number of the first plurality and the second plurality of drift cathode strips is selected from a range spanning 1 to 50, wherein a value for the bias voltage is selected from a range spanning 0V to 12V, and wherein the particular range of energies spans 1 keV to 1000 keV.

14. The method of claim 13 , wherein the bulk material comprises silicon, and wherein the p-type dopant is boron and the n-type dopant is phosphorous.

15. The method of claim 13 , further comprising:
generating, using an X-ray source, the X-ray pulse.

16. The method of claim 13 , further comprising:
selecting the thickness of the semiconductor chip, the number of the first plurality and the sec

Assignees

• L Livermore Nat Security Llc
• Univ California

Inventors

• Hall David Lawrence
• Bora Mihail
• Conway Adam
• Datte Philip
• Shao Qinghui
• Swanberg Jr Erik Lars
• Trosseille Clement Antoine
• Hunt Charles Edward

Classifications

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10F39/802 Primary

  Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes · CPC title

• H10F39/189 Primary

  X-ray, gamma-ray or corpuscular radiation imagers · CPC title

• G01N23/083

  the radiation being X-rays · CPC title

• G01T1/241

  Electrode arrangements, e.g. continuous or parallel strips or the like · CPC title