Semiconductor device and manufacturing method thereof
US-2017213755-A1 · Jul 27, 2017 · US
US11996380B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11996380-B2 |
| Application number | US-201917309705-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 23, 2019 |
| Priority date | Dec 31, 2018 |
| Publication date | May 28, 2024 |
| Grant date | May 28, 2024 |
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An article includes a solid circuit die on a first major surface of a substrate, wherein the solid circuit die includes an arrangement of contact pads, and wherein at least a portion of the contact pads in the arrangement of contact pads are at least partially exposed on the first major surface of the substrate to provide an arrangement of exposed contact pads; a guide layer including an arrangement of microchannels, wherein the guide layer contacts the first major surface of the substrate such that at least some microchannels in the arrangement of microchannels overlie the at least some exposed contact pads in the arrangement of exposed contact pads; and a conductive particle-containing liquid in at least some of the microchannels. Other articles and methods of manufacturing the articles are described.
Opening claim text (preview).
The invention claimed is: 1. A method for manufacturing an electronic device, comprising: placing a solid circuit die with one or more contact pads on a first major surface of a substrate such that the one or more contact pads contacts the first major surface of the substrate to provide an at least partially sealed contact pad; placing an electrically conductive trace on the first major surface of the substrate, wherein the electrically conductive trace has a first exposed major surface and a second surface, wherein the second surface of the electrically conductive trace contacts the first major surface of the substrate to provide an at least partially sealed electrically conductive trace; applying a liquid encapsulant over the first major surface of the substrate and the solid circuit die; hardening the liquid encapsulant to form a carrier with a first major surface contacting the first major surface of the substrate and forming an interface therewith; separating the carrier and the substrate at the interface to expose: (1) the at least partially sealed one or more contact pads on the first major surface of the carrier to provide an at least partially exposed one or more contact pads, and (2) the at least partially sealed electrically conductive trace to provide an at least partially exposed electrically conductive trace surface; applying a guide layer on the first major surface of the carrier, wherein the guide layer comprises a microchannel with a first end overlying the at least partially exposed contact pad and a second end overlying the exposed at least partially exposed electrically conductive trace surface; depositing a conductive particle-containing liquid in the microchannel to contact the at least partially exposed one or more contact pads and the at least partially exposed electrically conductive trace and form an interconnection therebetween; and solidifying the conductive particle-containing liquid to form an electrically conductive trace in the microchannel. 2. The method of claim 1 , wherein the substrate comprises a flexible polymeric material. 3. The method of claim 1 , wherein the solid circuit die is chosen from a semiconductor die, an integrated circuit (IC), a radio frequency identification (RFID) module, a near field communication (NFC) module, and mixtures and combinations thereof. 4. The method of claim 1 , comprising softening the substrate prior to placing the solid circuit die thereon. 5. The method of claim 1 , wherein the conductive particle-containing liquid is deposited in the microchannel between the first and the second ends thereof and flows primarily through capillary pressure between the first and the second ends thereof. 6. The method of claim 1 , wherein the conductive particle-containing liquid is deposited in the microchannel by blading. 7. The method of claim 1 , wherein the guide layer comprises a layer of a polymeric material, and an adhesive layer on the layer of polymeric material, and wherein the adhesive layer contacts the first major surface of the carrier. 8. The method of claim 7 , wherein the guide layer further comprises a removable release liner on the adhesive layer, and wherein the release liner is peeled from the adhesive layer prior to the applying step. 9. A method for manufacturing an electronic device, comprising: placing a solid circuit die with one or more contact pads on a first major surface of a substrate such that the one or more contact pads contacts the first major surface of the substrate to provide an at least partially sealed contact pad; placing an electrically conductive trace on the first major surface of the substrate, wherein the electrically conductive trace has a first exposed major surface and a second surface, wherein the second surface of the electrically conductive trace contacts the first major surface of the substrate to provide an at least partially sealed electrically conductive trace; applying a liquid encapsulant over the first major surface of the substrate, the solid circuit die and the electrically conductive trace; hardening the liquid encapsulant to form a carrier with a first major surface contacting the first major surface of the substrate and forming an interface therewith; separating the carrier and the substrate at the interface to expose: (1) the at least partially sealed one or more contact pads on the first major surface of the carrier to provide an at least partially exposed one or more contact pads, and (2) the at least partially sealed electrically conductive trace to provide an at least partially exposed electrically conductive trace surface; laminating a guide layer on the first major surface of the carrier, wherein the guide layer comprises a microchannel with a first end overlying the at least partially exposed contact pad and a second end overlying the exposed at least partially exposed electrically conductive trace surface; applying a mask layer over the guide layer and the first major surface of the carrier, wherein the microchannel in the guide layer remains exposed; vapor depositing a conductive particle-containing liquid on the mask layer and in the microchannel of the guide layer, wherein the conductive particle-containing liquid contacts the at least partially exposed one or more contact pads and the at least partially exposed electrically conductive trace and form an interconnection therebetween; solidifying the conductive particle-containing liquid to form an electrically conductive trace in the microchannel; and removing the mask layer. 10. The method of claim 9 , wherein the guide layer further comprises a release liner on an exposed surface thereof, and the release liner is removed from the guide layer after removing the mask layer.
Configurations of laterally-adjacent chips · CPC title
Package configurations · CPC title
characterised by their materials · CPC title
Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title
Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title
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