Printed circuit board assembly

US11985757B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11985757-B2
Application numberUS-202117372032-A
CountryUS
Kind codeB2
Filing dateJul 9, 2021
Priority dateApr 29, 2019
Publication dateMay 14, 2024
Grant dateMay 14, 2024

How to read this patent

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  1. Title

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  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed circuit board assembly includes a first printed circuit board, a second printed circuit board disposed on the first printed circuit board and including an antenna pattern, a third printed circuit board disposed on the first printed circuit board, one or more first electronic components disposed between the first and the second printed circuit board and electrically connected to at least one of the first and the second printed circuit board, one or more second electronic components disposed between the first and the third printed circuit board, and electrically connected to at least one of the first and the third printed circuit board, a first interposer substrate electrically connecting the first printed circuit board and the second printed circuit board to each other, and a second interposer substrate electrically connecting the first printed circuit board and the third printed circuit board to each other.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed circuit board assembly, comprising: a first printed circuit board having a first surface and a second surface opposing the first surface; a second printed circuit board disposed on the first surface of the first printed circuit board and including an antenna pattern disposed on a first surface of the second printed circuit board; a first electronic component disposed on a second surface of the second printed circuit board opposing the first surface of the second printed circuit board; a second electronic component disposed on the first surface of the first printed circuit board; a first interposer substrate disposed around the first and second electronic components and electrically connecting the first printed circuit board and the second printed circuit board to each other; a third printed circuit board disposed on the first surface of the first printed circuit board and spaced apart from the second printer circuit board; a third electronic component disposed on a surface of the third printed circuit board; a fourth electronic component disposed on the first surface of the first printed circuit board; and a second interposer substrate disposed around the third and fourth electronic components and electrically connecting the first printed circuit board and the third printed circuit board to each other, wherein the first printed circuit board, the second electronic component, the first electronic component, and the second printed circuit board are sequentially disposed, and wherein the first printed circuit board, the fourth electronic component, the third electronic component and the third printed circuit board are sequentially disposed. 2. The printed circuit board assembly of claim 1 , further comprising: a fifth electronic component disposed on one of the second surface of the first printed circuit board or a surface of the third printed circuit board opposing the surface thereof on which the third electronic component is disposed; and a metal layer covering the fifth electronic component. 3. The printed circuit board assembly of claim 1 , further comprising: a metal layer disposed between the first and second electronic components. 4. The printed circuit board assembly of claim 1 , further comprising: an interconnect structure, on which the first electronic component is disposed, disposed on the second surface of the second printed circuit board, wherein the first electronic component is electrically connected to the first printed circuit board through a redistribution layer of the interconnect structure and the first interposer substrate. 5. The printed circuit board assembly of claim 1 , wherein the first surface of the second printed circuit board is devoid of any semiconductor device or die. 6. The printed circuit board assembly of claim 1 , wherein the second printed circuit board includes a recess in which the antenna pattern is disposed. 7. A printed circuit board assembly, comprising: a first printed circuit board having a first surface and a second surface opposing the first surface; a second printed circuit board disposed on the first surface of the first printed circuit board and including an antenna pattern; a first electronic component disposed on a surface of the second printed circuit board opposing the antenna pattern; a second electronic component disposed on the first surface of the first printed circuit board; a first interposer substrate disposed around the first and second electronic components and electrically connecting the first printed circuit board and the second printed circuit board to each other; a third printed circuit board disposed on the first surface of the first printed circuit board and spaced apart from the second printed circuit board; a third electronic component disposed on a surface of the third printed circuit board; a fourth electronic component disposed on the first surface of the first printed circuit board; and a second interposer substrate disposed around the third and fourth electronic components and electrically connecting the first printed circuit board and the third printed circuit board to each other, wherein the first printed circuit board, the second electronic component, the first electronic component, and the second printed circuit board are sequentially disposed, and wherein the first printed circuit board, the fourth electronic component, the third electronic component, and the third printed circuit board are sequentially disposed. 8. The printed circuit board assembly of claim 7 , further comprising: a fifth electronic component disposed on one of the second surface of the first printed circuit board or a surface of the third printed circuit board opposing the surface thereof on which the third electronic component is disposed; and a metal layer covering the fifth electronic component. 9. The printed circuit board assembly of claim 7 , further comprising: a metal layer disposed between the first and second electronic components. 10. The printed circuit board assembly of claim 7 , further comprising: an interconnect structure, on which the first electronic components is disposed, disposed on the surface of the second printed circuit board opposing the antenna pattern, wherein the first electronic component is electrically connected to the first printed circuit board through a redistribution layer of the interconnect structure and the first interposer substrate.

Assignees

Inventors

Classifications

  • of the portions that connect to chips, wafers or package parts · CPC title

  • for antennas · CPC title

  • the substrate having spherical bumps for external connection · CPC title

  • comprising multiple insulating layers · CPC title

  • the multiple chips being integrally enclosed · CPC title

Patent family

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External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11985757B2 cover?
A printed circuit board assembly includes a first printed circuit board, a second printed circuit board disposed on the first printed circuit board and including an antenna pattern, a third printed circuit board disposed on the first printed circuit board, one or more first electronic components disposed between the first and the second printed circuit board and electrically connected to at lea…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H10W70/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 14 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).