NEUTRAL pH COPPER PLATING SOLUTION FOR UNDERCUT REDUCTION
US-2020248329-A1 · Aug 6, 2020 · US
Method of forming brass-coated metals in flip-chip redistribution layers
US11984418B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11984418-B2 |
| Application number | US-202217884284-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 9, 2022 |
| Priority date | Dec 19, 2019 |
| Publication date | May 14, 2024 |
| Grant date | May 14, 2024 |
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- Title
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- Abstract
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- Assignees and inventors
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- Key dates
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- First independent claim
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- CPC / IPC classifications
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Abstract
Official abstract text for this publication.
A method for manufacturing a package includes positioning a copper layer above a die. A zinc layer is positioned on the copper layer. The zinc and copper layers are then heated to produce a brass layer, the brass layer abutting the copper layer. Further, a polymer layer is positioned abutting the brass layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for manufacturing a package, comprising: positioning a copper layer above a die; positioning a zinc layer on the copper layer; heating the zinc and copper layers to produce a brass layer, the brass layer abutting the copper layer; and positioning a polymer layer abutting the brass layer. 2. The method of claim 1 , wherein positioning the zinc layer on the copper layer comprises using physical vapor deposition to deposit the zinc layer on the copper layer. 3. The method of claim 1 , wherein positioning the zinc layer on the copper layer comprises using an immersion technique to deposit the zinc layer on the copper layer. 4. The method of claim 1 , wherein heating the zinc and copper layers includes heating at a temperature ranging from 100 degrees Celsius to 900 degrees Celsius. 5. The method of claim 1 further comprising etching areas of the zinc layer not abutting the copper layer. 6. The method of claim 1 further comprising patterning the polymer layer to create an orifice that exposes a portion of the brass layer. 7. The method of claim 6 further comprising dropping a solder ball in the orifice abutting the polymer layer and the brass layer, the solder ball electrically connected to the die. 8. The method of claim 6 further comprising plating over the orifice to create an under bump metallization layer and then dropping a solder ball on the under bump metallization layer. 9. The method of claim 1 , wherein prior to positioning a copper layer above a die, depositing a seed layer comprising a titanium/titanium-tungsten layer on the die. 10. The method of claim 9 , wherein the titanium/titanium-tungsten layer has a thickness ranging from 500 A to 5000 A. 11. The method of claim 1 , wherein the copper layer has a thickness ranging from 2 microns to 30 microns. 12. The method of claim 1 , wherein the brass layer has a thickness ranging from 0.05 microns to 2 microns. 13. The method of claim 1 , wherein the polymer layer has a thickness ranging from 3 microns to 35 microns.
Assignees
Inventors
Classifications
Chemical or physical modification, e.g. by sintering or anodisation (patterning H10W72/01951) · CPC title
in gaseous form, e.g. by CVD or PVD · CPC title
by plating, e.g. electroless plating or electroplating · CPC title
Thermally treating (reflowing H10W72/01257) · CPC title
in gaseous form, e.g. by CVD or PVD · CPC title
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Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US11984418B2 cover?
- A method for manufacturing a package includes positioning a copper layer above a die. A zinc layer is positioned on the copper layer. The zinc and copper layers are then heated to produce a brass layer, the brass layer abutting the copper layer. Further, a polymer layer is positioned abutting the brass layer.
- Who is the assignee on this patent?
- Texas Instruments Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W72/20. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 14 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).