Efficient IGBT switching

Patent metadata

Field	Value
Publication number	US-11979141-B2
Application number	US-202117404847-A
Country	US
Kind code	B2
Filing date	Aug 17, 2021
Priority date	Jan 9, 2012
Publication date	May 7, 2024
Grant date	May 7, 2024

Abstract

Embodiments of the invention provide IGBT circuit modules with increased efficiencies. These efficiencies can be realized in a number of ways. In some embodiments, the gate resistance and/or voltage can be minimized. In some embodiments, the IGBT circuit module can be switched using an isolated receiver such as a fiber optic receiver. In some embodiments, a single driver can drive a single IGBT. And in some embodiments, a current bypass circuit can be included. Various other embodiments of the invention are disclosed.

First claim

What is claimed is:

1. A solid-state switch circuit comprising:
a first receiver;
a first power supply;
a first pre-driver electrically coupled with the first receiver and the first power supply;
a second power supply that produces a voltage greater than a voltage produced by the first power supply;
a first driver electrically coupled with the first pre-driver and the second power supply;
a first solid-state switch having a first gate, a first collector, and a first emitter, the gate electrically coupled with the first driver;
a second receiver;
a second pre-driver electrically coupled with the second receiver and the first power supply;
a second driver electrically coupled with the second pre-driver and the second power supply; and
a second solid-state switch having a second gate, a second collector, and a second emitter, the second gate electrically coupled with the second driver, the second collector electrically coupled with the first emitter, and a load electrically coupled between the second emitter and the first collector.

2. The solid-state switch circuit according to claim 1 , wherein the first driver is coupled with the first gate without an additional component.

3. The solid-state switch circuit according to claim 1 , wherein a turn-off delay time of the first solid-state switch is less than 100 ns.

4. The solid-state switch circuit according to claim 1 , wherein a turn-on delay time of the first solid-state switch is less than 100 ns.

5. The solid-state switch circuit according to claim 1 , wherein the first solid-state switch comprises an IGBT switch or a MOSFET switch, and the second solid-state switch comprises an IGBT switch or a MOSFET switch.

6. The solid-state switch circuit according to claim 1 , wherein the first receiver is a fiber optic receiver, and the second receiver is a fiber optic receiver.

7. The solid-state switch circuit according to claim 1 , wherein a ground for the first solid-state switch and a ground for the second solid-state switch are isolated relative to each other.

8. The solid-state switch circuit according to claim 1 , further comprising a third power supply electrically coupled with the first driver and the first emitter.

9. The solid-state switch circuit according to claim 8 , wherein the third power supply is electrically coupled with the second driver and the second emitter.

10. The solid-state switch circuit according to claim 1 , wherein the first driver is coupled directly with the first gate via a circuit trace.

11. The solid-state switch circuit according to claim 1 , wherein the first driver is coupled directly with the first gate via a circuit trace with an additional component.

12. A solid-state switch circuit comprising:
a first receiver;
a power supply;
a first driver electrically coupled with the first receiver and the power supply;
a first solid-state switch having a first gate, a first collector, and a first emitter, the gate electrically coupled with the first driver;
a second receiver;
a second driver electrically coupled with the second receiver and the power supply; and
a second solid-state switch having a second gate, a second collector, and a second emitter, the second gate electrically coupled with the second driver, the second collector electrically coupled with the first emitter, and a load electrically coupled between the second emitter and the first collector.

13. The solid-state switch circuit according to claim 12 , further comprising:
a second power supply producing a voltage less than the voltage produced by the power supply;
a first pre-driver electrically coupled between the first receiver and the first driver, and the first pre-driver electrically coupled with the second power supply; and
a second pre-driver electrically coupled between the second receiver and the second driver, and the second pre-driver electrically coupled with the second power supply.

14. The solid-state switch circuit according to claim 12 , wherein the first driver is coupled with the first gate without an additional component.

15. The solid-state switch circuit according to claim 12 , wherein a turn-off delay time of the first solid-state switch is less than 100 ns.

16. The solid-state switch circuit according to claim 12 , wherein a turn-on delay time of the first solid-state switch is less than 100 ns.

17. The solid-state switch circuit according to claim 12 , wherein the first solid-state switch comprises an IGBT switch or a MOSFET switch, and the second solid-state switch comprises an IGBT switch or a MOSFET switch.

18. The solid-state switch circuit according to claim 12 , wherein the first receiver is a fiber optic receiver, and the second receiver is a fiber optic receiver.

19. The solid-state switch circuit according to claim 12 , wherein a ground for the first solid-state switch and a ground for the second solid-state switch are isolated relative to each other.

20. The solid-state switch circuit according to claim 12 , wherein a ground for the first driver and a ground for the second driver are isolated relative to each other.

21. The solid-state switch circuit according to claim 12 , wherein the first driver is coupled directly with the first gate via a circuit trace.

22. The solid-state switch circuit according to claim 12 , wherein the first driver is coupled directly with the first gate via a circuit trace with an additional component.

23. A solid-state switch circuit comprising:
a first receiver;
a power supply;
a first driver electrically coupled with the first receiver and the power supply;
a first solid-state switch having a first gate, a first collector, and a first emitter, the gate electrically coupled with the first driver;
a second receiver;
a second driver electrically coupled with the second receiver and the power supply; and
a second solid-state switch having a second gate, a second collector, and a second emitter, the second gate electrically coupled with the second driver, the second collector electrically coupled with the first emitter, and a load electrically coupled between the second emitter and the first collector;
wherein a ground for the first driver and a ground for the second driver are isolated relative to each other;
wherein a ground for the first solid-state switch and a ground for the second solid-state switch are isolated relative to each other.

24. The solid-state switch circuit according to claim 23 , wherein the first solid-state switch comprises an IGBT switch or a MOSFET switch, and the second solid-state switch comprises an IGBT switch or a MOSFET switch.

25. The solid-state switch circuit according to claim 23 , wherein the first receiver is a fiber optic receiver, and the second receiver is a fiber optic receiver.

26. A solid-state switch circuit comprising:
a first receiver;
a first power supply;
a first pre-driver electrically coupled with the first receiver and the first power supply;
a second power supply that produces a voltage greater than a voltage produced by the first power supply;
a first driver electrically coupled with the first pre-driver and the second power supply;
a first solid-state switch having a first gate, a first collector, and a first emitter, the gate electrically coupled with the first driver;
a second receiver;
a third power supply that produces a voltage the same as a voltage produced by the first power supply;
a second

Assignees

• Eagle Harbor Tech Inc
• EHT Ventures LLC

Inventors

• Ziemba Timothy
• Miller Kenneth E
• Carscadden John G
• Prager James

Classifications

• H10W70/658

  for devices provided for in groups H10D8/00 - H10D48/00 · CPC title

• H10W44/501

  Inductive arrangements (H10W44/20 takes precedence) · CPC title

• H10D12/411

  Insulated-gate bipolar transistors [IGBT] · CPC title

• H03K17/0406 Primary

  in composite switches · CPC title

• H01H9/54

  Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere · CPC title