Unified kernel virtual address space for heterogeneous computing

US11960410B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11960410-B2
Application numberUS-202017105331-A
CountryUS
Kind codeB2
Filing dateNov 25, 2020
Priority dateJul 23, 2019
Publication dateApr 16, 2024
Grant dateApr 16, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Systems, apparatuses, and methods for implementing a unified kernel virtual address space for heterogeneous computing are disclosed. A system includes at least a first subsystem running a first kernel, an input/output memory management unit (IOMMU), and a second subsystem running a second kernel. In order to share a memory buffer between the two subsystems, the first subsystem allocates a block of memory in part of the system memory controlled by the first subsystem. A first mapping is created from a first logical address of the kernel address space of the first subsystem to the block of memory. Then, the IOMMU creates a second mapping to map the physical address of that block of memory from a second logical address of the kernel address space of the second subsystem. These mappings allow the first and second subsystems to share buffer pointers which reference the block of memory.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: mapping a first region of a first kernel address space to a first region in a first physical address space; mapping a first region of a second kernel address space to the first region in the first physical address space, wherein mapping the first region of the second kernel address space to the first region in the first physical address space comprises mapping the first region of the second kernel address space to a first region in a device memory space, and mapping the first region in the device memory space to the first region in the first physical address space; enabling a common shared region in both the first kernel address space and the second kernel address space for use; and creating a unified kernel address space, based at least in part on the common shared region. 2. The method as recited in claim 1 , further comprising: passing a buffer pointer from a first subsystem to a second subsystem different from the first subsystem using the unified kernel address space, to enable the first subsystem and the second subsystem to share at least one buffer. 3. The method as recited in claim 2 , wherein the common shared region is enabled for sharing by both the first subsystem and the second subsystem. 4. The method as recited in claim 1 , wherein addresses in the first region of the first kernel address space are mapped to same locations in the first physical address space as addresses in the first region of the second kernel address space. 5. The method as recited in claim 1 , wherein said mapping of the first region of the first kernel address space to the first region in the first physical address space is performed by a first subsystem. 6. The method as recited in claim 5 , wherein said mapping of the first region of the second kernel address space to the first region in first physical address space is performed by a second subsystem different from the first subsystem. 7. The method as recited in claim 6 , wherein mapping the first region of the second kernel address space to a device memory space is performed by an input/output memory management unit. 8. A system comprising: a first subsystem comprising circuitry configured to map a first region of a first kernel address space to a first region in a first physical address space; and a second subsystem comprising circuitry configured to map a first region of a second kernel address space to the first region in first physical address space, wherein the second subsystem is configured to map the first region of the second kernel address space to a first region in a device memory space, and map the first region in the device memory space to the first region in the first physical address space; wherein the system configured to enable a common shared region in both the first kernel address space and the second kernel address space for use, and create a unified kernel address space, based at least in part on the common shared region. 9. The system as recited in claim 8 , wherein the second subsystem is configured to: pass a buffer pointer to the first subsystem using the unified kernel address space; and share at least one buffer with the first subsystem using the buffer pointer. 10. The system as recited in claim 8 , wherein addresses in the first region of the first kernel address space are mapped to same locations in the first physical address space as addresses in the first region of the second kernel address space. 11. The system as recited in claim 8 , wherein the second subsystem is an input/output memory management unit. 12. The system as recited in claim 8 , wherein the first subsystem is configured to allocate the first region in the first physical address space. 13. The system as recited in claim 8 , wherein the first subsystem is configured to convey to the second subsystem a pointer to a location in the first region of the first physical address space, wherein the first subsystem is configured to convey the pointer to the second subsystem via the common shared region. 14. The system as recited in claim 13 , wherein the second subsystem comprises an input/output memory management unit configured to map the first region of the second kernel address space to the first region in first physical address space. 15. A system comprising: a memory device; a first processing device comprising circuitry configured to map a first region of a first virtual address space to a region in the memory device; and a second processing device comprising circuitry configured to: map a first region of a second virtual address space to the region in the memory device such that the region in the memory device is shared by the first processing device and the second processing device, wherein to map the first region of the second virtual address space to the region in the memory device, the second processing device is further configured to map the first region of the second virtual address space to a first region in a device memory space, and map the first region in the device memory space to the region in the memory device; and create a unified kernel address space, based at least in part on an enabled common shared region with the first processing device. 16. The system as recited in claim 15 , wherein the second processing device is configured to: pass a buffer pointer to the first processing device, using the unified kernel address space, to enable sharing of at least one buffer with the first processing device. 17. The system as recited in claim 15 , wherein addresses in the first region of the first virtual address space are mapped to same locations in the memory device as addresses in the first region of the second virtual address space. 18. The system as recited in claim 15 , wherein the second processing device comprises an input/output memory management unit configured to map the device memory space to the region in the memory device. 19. The system as recited in claim 15 , wherein the first processing device is configured to allocate the region in the memory device. 20. The system as recited in claim 15 , wherein the first processing device is configured to convey to the second processing device a pointer to a location in the region of the memory device, wherein the first processing device is configured to convey the pointer to the second processing device via the region in the memory device.

Assignees

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Classifications

  • using page tables, e.g. page table structures · CPC title

  • Buffers; Shared memory; Pipes · CPC title

  • where tasks reside in different layers, e.g. user- and kernel-space · CPC title

  • in block erasable memory, e.g. flash memory · CPC title

  • G06F12/109Primary

    for multiple virtual address spaces, e.g. segmentation (G06F12/1036 takes precedence) · CPC title

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What does patent US11960410B2 cover?
Systems, apparatuses, and methods for implementing a unified kernel virtual address space for heterogeneous computing are disclosed. A system includes at least a first subsystem running a first kernel, an input/output memory management unit (IOMMU), and a second subsystem running a second kernel. In order to share a memory buffer between the two subsystems, the first subsystem allocates a block…
Who is the assignee on this patent?
Ati Technologies Ulc
What technology area does this patent fall under?
Primary CPC classification G06F12/1009. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 16 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).