Unified kernel virtual address space for heterogeneous computing

Patent metadata

Field	Value
Publication number	US-10853263-B1
Application number	US-201916519311-A
Country	US
Kind code	B1
Filing date	Jul 23, 2019
Priority date	Jul 23, 2019
Publication date	Dec 1, 2020
Grant date	Dec 1, 2020

Abstract

Systems, apparatuses, and methods for implementing a unified kernel virtual address space for heterogeneous computing are disclosed. A system includes at least a first subsystem running a first kernel, an input/output memory management unit (IOMMU), and a second subsystem running a second kernel. In order to share a memory buffer between the two subsystems, the first subsystem allocates a block of memory in part of the system memory controlled by the first subsystem. A first mapping is created from a first logical address of the kernel address space of the first subsystem to the block of memory. Then, the IOMMU creates a second mapping to map the physical address of that block of memory from a second logical address of the kernel address space of the second subsystem. These mappings allow the first and second subsystems to share buffer pointers which reference the block of memory.

First claim

What is claimed is:

1. A system, comprising:
a memory subsystem;
a first subsystem with a first kernel address space;
a second subsystem with a second kernel address space; and
an input/output memory management unit (IOMMU);
wherein the system is configured to:
allocate, by the first subsystem, a block of memory at a first physical address in a physical address space corresponding to the memory subsystem;
create, by the first subsystem, a mapping of a first logical address in the first kernel address space to the first physical address, wherein the first logical address in the first kernel address space is a first offset away from the first physical address;
select, by the IOMMU, a device address that is a second offset away from the first logical address in the second kernel address space;
create an IOMMU mapping of the selected device address in the device address space to the first physical address; and
enable, with the IOMMU mapping, a common shared region in both the first kernel address space and the second kernel address space for use by both the first subsystem and the second subsystem.

2. The system as recited in claim 1 , wherein the first subsystem is configured to convey, to the second subsystem, a buffer pointer which points to the block of memory, wherein the buffer pointer is specified in the first kernel address space.

3. The system as recited in claim 2 , wherein the system is further configured to:
execute, by the second subsystem, a memory access instruction that references the buffer pointer in the first kernel address space without performing a conversion of the buffer pointer; and
convert, with the IOMMU mapping, the buffer pointer to the physical address space when accessing, by the second subsystem, the block of memory.

4. The system as recited in claim 1 , wherein:
logical addresses in the first kernel address space are a first offset from corresponding addresses in the physical address space;
logical addresses in the second kernel address space are a second offset from corresponding addresses in a device address space; and
the IOMMU mapping creates an overlay such that logical addresses in the second kernel address space pointing to the block of memory are identical to logical addresses in the first kernel address space.

5. The system as recited in claim 1 , wherein:
the first subsystem executes a first operating system; and
the second subsystem executes a second operating system different from the first operating system.

6. The system as recited in claim 5 , wherein:
the first subsystem comprises a first memory management unit (MMU); and
the second subsystem comprises a second MMU different from the first MMU.

7. The system as recited in claim 1 , wherein the common shared region maps to the block of memory in the physical address space.

8. A method, comprising:
allocating, by a first subsystem with a first kernel address space, a block of memory at a first physical address in a physical address space;
creating, by the first subsystem, a mapping of a first logical address in the first kernel address space to the first physical address, wherein the first logical address in the first kernel address space is a first offset away from the first physical address;
selecting, by an input/output memory management unit (IOMMU), a device address that is a second offset away from the first logical address in a second kernel address space of a second subsystem;
creating, by the IOMMU, an IOMMU mapping of the selected device address in the device address space to the first physical address; and
enabling, with the IOMMU mapping, a common shared region in both the first kernel address space and the second kernel address space for use by both the first subsystem and the second subsystem.

9. The method as recited in claim 8 , further comprising conveying, from the first subsystem to the second subsystem, a buffer pointer which points to the block of memory, wherein the buffer pointer is specified in the first kernel address space.

10. The method as recited in claim 9 , further comprising:
executing, by the second subsystem, a memory access instruction that references the buffer pointer in the first kernel address space without performing a conversion of the buffer pointer; and
converting, with the IOMMU mapping, the buffer pointer to the physical address space when accessing, by the second subsystem, the block of memory.

11. The method as recited in claim 8 , wherein:
logical addresses in the first kernel address space are a first offset from corresponding addresses in the physical address space;
logical addresses in the second kernel address space are a second offset from corresponding addresses in a device address space; and
the method further comprising creating, by the IOMMU mapping, an overlay such that logical addresses in the second kernel address space pointing to the block of memory are identical to logical addresses in the first kernel address space.

12. The method as recited in claim 8 , wherein:
the first subsystem executes a first operating system; and
the second subsystem executes a second operating system different from the first operating system.

13. The method as recited in claim 12 , wherein:
the first subsystem comprises a first memory management unit (MMU); and
the second subsystem comprises a second MMU different from the first MMU.

14. The method as recited in claim 8 , wherein the common shared region maps to the block of memory in the physical address space.

15. An apparatus, comprising:
a memory storing program instructions; and
at least one processor coupled to the memory, wherein the program instructions are executable by the at least one processor to:
allocate, by a first subsystem with a first kernel address space, a block of memory at a first physical address in a physical address space;

create, by the first subsystem, a mapping of a first logical address in the first kernel address space to the first physical address, wherein the first logical address in the first kernel address space is a first offset away from the first physical address;
select, by an input/output memory management unit (IOMMU), a device address that is a second offset away from the first logical address in a second kernel address space of a second subsystem;
create, by the IOMMU, an IOMMU mapping of the selected device address in the device address space to the first physical address; and
enable, with the IOMMU mapping, a common shared region in both the first kernel address space and the second kernel address space for use by both the first subsystem and the second subsystem.

16. The apparatus as recited in claim 15 , wherein the program instructions are executable by the at least one processor to convey, from the first subsystem to the second subsystem, a buffer pointer which points to the block of memory, wherein the buffer pointer is specified in the first kernel address space.

17. The apparatus as recited in claim 16 , wherein the program instructions are executable by the at least one processor to:
execute, by the second subsystem, a memory access instruction that references the buffer pointer in the first kernel address space without performing a conversion of the buffer pointer; and
convert, with the IOMMU mapping, the buffer pointer to the physical address space when accessing, by the second subsystem, the block of memory.

18. The apparatus as recited in claim 15 , wherein:
logical addresses in the first kernel address space are a first offset from corresponding addresse

Assignees

• Ati Technologies Ulc

Inventors

• Kwong Tung Chuen
• Chan Benjamin Koon Pan
• Atkinson William Lloyd

Classifications

• G06F2212/657

  Virtual address space management · CPC title

• G06F12/109 Primary

  for multiple virtual address spaces, e.g. segmentation (G06F12/1036 takes precedence) · CPC title

• G06F12/1009 Primary

  using page tables, e.g. page table structures · CPC title

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title

• G06F9/545

  where tasks reside in different layers, e.g. user- and kernel-space · CPC title