Reverse selective etch stop layer

Patent metadata

Field	Value
Publication number	US-11955382-B2
Application number	US-202017110818-A
Country	US
Kind code	B2
Filing date	Dec 3, 2020
Priority date	Dec 3, 2020
Publication date	Apr 9, 2024
Grant date	Apr 9, 2024

Abstract

Methods and apparatus for forming a reverse selective etch stop layer are disclosed. Some embodiments of the disclosure provide interconnects with lower resistance than methods which utilize non-selective (e.g., blanket) etch stop layers. Some embodiments of the disclosure utilize reverse selective etch stop layers within a subtractive etch scheme. Some embodiments of the disclosure selectively deposit the etch stop layer by passivating the surface of the metal material.

First claim

What is claimed is:

1. A method comprising:
selectively depositing an etch stop layer on a first dielectric material over a first metal material, the first dielectric material comprising a plurality of features formed therein with the first metal material within the plurality of features;
depositing a second metal material on the first metal material and the etch stop layer;
etching the second metal material to expose a portion of the etch stop layer; and
removing the portion of the etch stop layer exposed by etching the second metal material to expose a top surface of the first dielectric material,
wherein a top surface of the second metal material is higher than the exposed top surface of the first dielectric material.

2. The method of claim 1 , wherein the first dielectric material consists essentially of a low-k dielectric.

3. The method of claim 1 , wherein the first metal material consists essentially of copper.

4. The method of claim 1 , wherein the etch stop layer is deposited with a selectivity greater than or equal to 5.

5. The method of claim 1 , wherein the first metal material and the second metal material are the same material.

6. The method of claim 1 , wherein at least one feature of the plurality of features is a via.

7. The method of claim 1 , wherein the top surface of the first metal material is coplanar with a top surface of first dielectric material.

8. The method of claim 1 , wherein the first metal material does not completely fill the plurality of features.

9. The method of claim 8 , wherein the second metal material fills the plurality of features and is deposited on a top surface of the etch stop layer.

10. The method of claim 1 , wherein selectively depositing the etch stop layer comprises:
exposing the first metal material to a blocking compound to form a passivated surface of the first metal material; and
depositing the etch stop layer on the first dielectric material over the passivated surface of the first metal material.

11. The method of claim 10 , wherein the blocking compound comprises one or more of a phosphoric acid, alkyl silane, halogenated silane, thiol or unsaturated hydrocarbon.

12. The method of claim 10 , further comprising removing the blocking compound from the passivated surface of the first metal material before depositing the second metal material.

13. The method of claim 12 , wherein the blocking compound is removed by exposure to a plasma comprising H 2 .

14. The method of claim 1 , wherein the etch stop layer comprises tantalum nitride (TaN).

15. The method of claim 1 , wherein the method forms a conductive path between the first metal material within at least two of the plurality of features.

16. The method of claim 1 , wherein etching the second metal material comprises a photolithography process.

17. The method of claim 1 , wherein the resistance between the first metal material and the second metal material is less than the resistance of a similar device formed with a non-selective (blanket) etch stop layer.

18. A method comprising:
exposing a first dielectric material to a blocking compound, the first dielectric material comprising a plurality of features formed therein and a first metal material within the plurality of features, wherein exposing the first dielectric material to the blocking compound forms a passivated surface of the first metal material;
selectively depositing an etch stop layer on the first dielectric material over the passivated surface of the first metal material;
removing the blocking compound from the passivated surface of first metal material;
depositing a second metal material on the first metal material and the etch stop layer after removing the blocking compound from the passivated surface of first metal material;
etching the second metal material by photolithography to expose a portion of the etch stop layer and form a conductive path between the first metal material within the plurality of features; and
removing the portion of the etch stop layer exposed by etching the second metal material to expose a top surface of the first dielectric material,
wherein a top surface of the second metal material is higher than the exposed top surface of the first dielectric material.

Assignees

• Applied Materials Inc

Inventors

• Kashefi Kevin
• Jansen Alexander
• Naik Mehul
• Ren He
• Chen Lu
• Chen Feng

Classifications

• H10W20/0633

  using subtractive patterning of the conductive members · CPC title

• H10W20/0693

  by forming self-aligned vias · CPC title

• H10P72/7602

  the wafers being placed on a robot blade or gripped by a gripper for conveyance · CPC title

• H10P72/0468

  comprising a chamber adapted to a particular process · CPC title

• H10P72/0454 Primary

  surrounding a central transfer chamber · CPC title