Pre-biased mode switching in system having selectable pulse-width modulated (PWM) and linear operation

Patent metadata

Field	Value
Publication number	US-11949321-B2
Application number	US-202117510707-A
Country	US
Kind code	B2
Filing date	Oct 26, 2021
Priority date	Oct 26, 2021
Publication date	Apr 2, 2024
Grant date	Apr 2, 2024

Abstract

An electronic control system provides selectable linear and pulse-width modulated (PWM) operation with reduced disruption when changing from PWM operation to linear operation. The system includes an output stage that has a push-pull driver coupled to the load, which may be a motor, a haptic device, or other device requiring current-mode control. The system also includes a pulse-width modulated (PWM) driver for providing pulse-width modulated drive signals to gates of the transistors of the output stage when a pulse-width modulated mode is selected, and a linear amplifier stage that provides a linear analog signal to the gates of the transistors when a linear mode is selected. A pre-charging circuit pre-charges the gates during a pre-charge cycle that is initiated when the operating mode changes from the PWM operating more to the linear operating mode.

First claim

What is claimed is:

1. An electronic system providing selectable driving of a load in either a pulse-width modulated operating mode or a linear operating mode, the electronic system comprising:
an output stage for supplying current to the load, the output stage having a push-pull driver provided by a P-channel transistor coupled between a power supply rail and the load and an N-channel transistor coupled between a power supply return and the load;
a mode selection control circuit for selecting between the pulse-width modulated operating mode and the linear operating mode as a selected operating mode;
a pulse-width modulator output driver for providing pulse-width modulated drive signals generated from one or more quantizer output signals to a gate of the P-channel transistor and a gate of the N-channel transistor, respectively, while the selected operating mode is the pulse-width modulated operating mode;
a linear amplifier stage for providing linear analog signals to the gates of the P-channel transistor and the N-channel transistor while the selected operating mode is the linear mode; and
a pre-charging circuit having outputs coupled to the gates of the P-channel transistor and the N-channel transistor and responsive to the mode selection control circuit for pre-charging the gates of the P-channel transistor and the N-channel transistor during a pre-charge cycle initiated when the mode selection control circuit changes the selected operating mode to the linear operating mode, wherein during the pre-charge cycle, the pulse-width modulated drive signals are not applied to the gate of the P-channel transistor and the gate of the N-channel transistor, so that the outputs of the pre-charging circuit are independent of the one or more quantizer output signals, and wherein the linear analog signals are applied to the gates of the P-channel transistor and the N-channel transistor along with the outputs of the pre-charging circuit.

2. The electronic system of claim 1 , further comprising a feedback control loop having at least one input coupled to an output of the output stage, wherein the feedback control loop controls either a voltage provided to the load or a current provided to the load by providing feedback to an input stage that generates at least one of the linear analog signals and the pulse-width modulated drive signals.

3. The electronic system of claim 1 , wherein the mode selection control circuit synchronizes the pre-charge cycle to the pulse-width modulated drive signals.

4. The electronic system of claim 1 , wherein the pulse-width modulator output driver includes pre-bias circuits coupled to the gates of the N-channel transistor and the P-channel transistor for biasing the P-channel transistor and the N-channel transistor, and wherein the pre-charging circuit is supplied by the pre-bias circuit being activated during the pre-charge cycle.

5. The electronic system of claim 4 , wherein the pulse-width modulator output driver is coupled to the mode selection control circuit to disable portions of the pulse-width modulator output driver other than the pre-bias circuit during the pre-charge cycle.

6. The electronic system of claim 5 , wherein the portions of the pulse-width modulator output driver other than the pre-bias circuit and the pre-bias circuit are both disabled subsequent to the pre-charge cycle while the selected operating mode is the linear operating mode.

7. The electronic system of claim 4 , wherein the pulse-width modulated output driver comprises an input circuit for generating pulse-width modulated output signals from at least one logic-level input signal, a slew control circuit for generating slew-rate controlled drive signals from the pulse-width modulated output signals and the pre-bias circuit for applying bias voltages to the slew-rate controlled drive signals to generate the pulse-width modulated drive signals.

8. The electronic system of claim 7 , wherein in response to the mode selection control circuit selecting the pulse-width modulated operating mode, the input circuit, the slew control circuit and the pre-bias circuit are enabled, wherein in response to the mode selection control circuit selecting the linear operating mode, the input circuit and the slew control circuit are disabled, and wherein in response to the mode selection control circuit selecting the linear operating mode and the pre-charge cycle expiring, the pre-bias circuit is disabled.

9. The electronic system of claim 1 , wherein the pre-charging circuit pre-charges the gates of the P-channel transistor and the N-channel transistor to pre-charge voltages determined in dependence on an input signal that provides an input to the linear amplifier stage.

10. The electronic system of claim 1 , wherein the pre-bias circuit is a circuit separate from the pulse-width modulator output driver and coupled to the mode selection control circuit.

11. The electronic system of claim 10 , wherein the mode selection control circuit only enables the pre-bias circuit during the pre-charge cycle.

12. The electronic system of claim 10 , further comprising a switching circuit coupled to the mode selection control circuit that selectively couples the pre-bias circuit to the input of the output stage during the pre-charge cycle.

13. A method providing selectable driving of a load in either a pulse-width modulated operating mode or a linear operating mode in an electronic system, comprising:
supplying current to the load from an output stage having a push-pull driver provided by a P-channel transistor coupled between a power supply rail and the load and an N-channel transistor coupled between a power supply return and the load;
selecting between the pulse-width modulated operating mode and the linear operating mode as a selected operating mode;
providing pulse-width modulated drive signals generated from one or more quantizer output signals to a gate of the P-channel transistor and a gate of the N-channel transistor, respectively, only while the selected operating mode is the pulse-width modulated operating mode;
providing linear analog signals to the gates of the P-channel transistor and the N-channel transistor while the selected operating mode is the linear mode;
responsive to the selecting between the pulse-width modulated operating mode and the linear operating mode changing the selected operating mode from the pulse-width modulated operating mode to the linear operating mode, initiating a pre-charge cycle; and
pre-charging the gates of the P-channel transistor and the N-channel transistor during the pre-charge cycle, so that the pre-charging and the linear analog signals are applied to the gates of the P-channel transistor and the N-channel transistor during the pre-charge cycle, wherein during the pre-charge cycle, the pulse-width modulated drive signals are not applied to the gate of the P-channel transistor and the N-channel transistor, so that the outputs of the pre-charging circuit are independent of the one or more quantizer output signals, and wherein the linear analog signals are applied to the gates of the P-channel transistor and the N-channel transistor along with the pre-charging.

14. The method of claim 13 , further comprising controlling either a voltage provided to the load or a current provided to the load by feedback provided to an input stage that generates at least one of the linear analog signals and the pulse-width modulated drive signals by a feedback control loop having at least one input coupled to an output of the output stage.

15. The method of claim 13 , wherein the initiating of the pre-charge cycle is synchronized with

Assignees

• Cirrus Logic Int Semiconductor Ltd
• Cirrus Logic Inc

Inventors

• Parupalli Vamsikrishna
• Jain Nishant
• Wang Mengde

Classifications

• H02M1/0045 Primary

  Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode · CPC title

• H02M1/088

  for the simultaneous control of series or parallel connected semiconductor devices · CPC title

• H02P27/08

  with pulse width modulation · CPC title

• H02M1/08 Primary

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M7/5387

  in a bridge configuration · CPC title