Minimizing crossover distortion in a class B current driver

US11070177B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11070177-B2
Application numberUS-201916562856-A
CountryUS
Kind codeB2
Filing dateSep 6, 2019
Priority dateSep 6, 2019
Publication dateJul 20, 2021
Grant dateJul 20, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system may include an output stage comprising a single-ended driver for driving a load at an output of the output stage, a loop filter coupled at its input to the output of the output stage and configured to minimize an error between a target current signal received by the loop filter and an output current driven on the load, and control circuitry configured to, when the load current is driven in a manner such that the load current changes polarity, reset a state variable of the loop filter.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: an output stage comprising a single-ended driver for driving a load at an output of the output stage; a loop filter coupled at its input to the output of the output stage and configured to minimize an error between a target current signal received by the loop filter and an output current driven on the load; and control circuitry configured to, when the load current is driven in a manner such that the load current changes polarity, reset a state variable of the loop filter. 2. The system of claim 1 , wherein the loop filter comprises a proportional-integral-derivative controller. 3. The system of claim 1 , wherein the control circuitry is configured to reset the state variable of the loop filter by driving the target current signal to an artificial level outside a normal operating range of the target current signal level. 4. The system of claim 3 , wherein driving the target current signal to the artificial level avoids a discontinuity associated with the loop filter. 5. The system of claim 4 , wherein the discontinuity associated with the loop filter comprises a discontinuity in an input to the loop filter. 6. The system of claim 3 , further wherein driving the target current signal to the artificial level shortens a time required to reset the state variable as compared to absence of driving with the artificial level. 7. The system of claim 4 , further wherein driving the target current signal to the artificial level avoids glitches occurring at the output. 8. A method comprising: driving a load at an output of an output stage with a single-ended driver of the output stage; minimizing an error between a target current signal and an output current driven on the load by a loop filter coupled at its input to the output of the output stage; and when the load current is driven in a manner such that the load current changes polarity, resetting a state variable of the loop filter. 9. The method of claim 8 , wherein the loop filter comprises a proportional-integral-derivative controller. 10. The method of claim 8 , further comprising resetting the state variable of the loop filter by driving the target current signal to an artificial level outside a normal operating range of the target current signal level. 11. The method of claim 10 , wherein driving the target current signal to the artificial level avoids a discontinuity associated with the loop filter. 12. The method of claim 11 , wherein the discontinuity associated with the loop filter comprises a discontinuity in an input to the loop filter. 13. The method of claim 11 , further wherein driving the target current signal to the artificial level shortens a time required to reset the state variable as compared to absence of driving with the artificial level. 14. The method of claim 11 , further wherein driving the target current signal to the artificial level avoids glitches occurring at the output. 15. A device comprising: a camera; and a camera module for controlling the camera, the camera module including a control subsystem comprising: an output stage comprising a single-ended driver for driving a load at an output of the output stage; a loop filter coupled at its input to the output of the output stage and configured to minimize an error between a target current signal received by the loop filter and an output current driven on the load; and control circuitry configured to, when the load current is driven in a manner such that the load current changes polarity, reset a state variable of the loop filter. 16. The device of claim 15 , wherein the loop filter comprises a proportional-integral-derivative controller. 17. The device of claim 15 , wherein the control circuitry is configured to reset the state variable of the loop filter by driving the target current signal to an artificial level outside a normal operating range of the target current signal level. 18. The device of claim 15 , wherein driving the target current signal to the artificial level avoids a discontinuity associated with the loop filter. 19. The device of claim 18 , wherein the discontinuity associated with the loop filter comprises a discontinuity in an input to the loop filter. 20. The device of claim 18 , further wherein driving the target current signal to the artificial level shortens a time required to reset the state variable as compared to absence of driving with the artificial level. 21. The device of claim 18 , further wherein driving the target current signal to the artificial level avoids glitches occurring at the output.

Assignees

Inventors

Classifications

  • Camera modules comprising integrated lens units and imaging units, specially adapted for being embedded in other devices, e.g. mobile phones or vehicles · CPC title

  • Power-operated focusing · CPC title

  • Pulse width modulation being used in an amplifying circuit · CPC title

  • with mechanism for focusing or varying magnification · CPC title

  • Bridge form coupled amplifiers; H-form coupled amplifiers · CPC title

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What does patent US11070177B2 cover?
A system may include an output stage comprising a single-ended driver for driving a load at an output of the output stage, a loop filter coupled at its input to the output of the output stage and configured to minimize an error between a target current signal received by the loop filter and an output current driven on the load, and control circuitry configured to, when the load current is drive…
Who is the assignee on this patent?
Cirrus Logic Int Semiconductor Ltd, Cirrus Logic Inc
What technology area does this patent fall under?
Primary CPC classification H03F3/21. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 20 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).