Data processing device, data driving device, and system for driving display device

Patent metadata

Field	Value
Publication number	US-11948488-B2
Application number	US-202217979747-A
Country	US
Kind code	B2
Filing date	Nov 2, 2022
Priority date	May 25, 2020
Publication date	Apr 2, 2024
Grant date	Apr 2, 2024

Abstract

The present disclosure relates to a data driving device, a data processing device, and a system for driving a display device and, more particularly, it relates to a data driving device, a data processing device, and a system for smoothly performing a low-speed communication through a communication line including an alternating current coupling capacitor.

First claim

What is claimed is:

1. A method for transmitting data by a first integrated circuit, the method comprising:
transmitting a preamble signal encoded using a direct current (DC) balance code, at a first transmission rate, to a second integrated circuit;
after transmitting the preamble signal, transmitting a configuration data signal encoded using the DC balance code, at the first transmission rate, to transmit data at a second transmission rate higher than the first transmission rate; and
transmitting the data at the second transmission rate, wherein
transmitting the preamble signal comprises transmitting at least one of a first data bit corresponding to a binary numeral “1” and a second data bit corresponding to a binary numeral “0” regularly.

2. The method of claim 1 , wherein the preamble signal is transmitted through a differential communication line comprising a plurality of communication lines.

3. The method of claim 2 , wherein the differential communication line comprises at least one alternating current (AC) coupling capacitor.

4. The method of claim 1 , wherein the DC balance code comprises a Manchester code.

5. The method of claim 1 , wherein the DC balance code comprises an 8B10B code.

6. The method of claim 1 , wherein the configuration data signal comprises configuration data used for setting up a communication environment for receiving the data transmitted by the first integrated circuit at the second transmission rate.

7. The method of claim 6 , wherein the configuration data signal further comprises header data corresponding to information related to the configuration data.

8. The method of claim 6 , wherein the configuration data signal further comprises checksum data.

9. The method of claim 6 , wherein the configuration data signal further comprises a start bit disposed before the configuration data.

10. The method of claim 6 , wherein the configuration data signal further comprises an end bit disposed after the configuration data.

11. A method for receiving and identifying data transmitted from a first integrated circuit, in a second integrated circuit, the method comprising:
receiving a preamble signal transmitted from the first integrated circuit at a first transmission rate, the preamble signal being encoded using a direct current (DC) balance code;
after receiving the preamble signal, receiving a configuration data signal transmitted from the first integrated circuit at the first transmission rate, the configuration data signal being encoded using the DC balance code;
receiving data transmitted from the first integrated circuit at a second transmission rate higher than the first transmission rate; and
identifying the data based on the configuration data signal, wherein
receiving the preamble signal comprises receiving at least one of a first data bit corresponding to a binary numeral “1” and a second data bit corresponding to a binary numeral “0” regularly.

12. The method of claim 11 , wherein the preamble signal is received through a differential communication line comprising a plurality of communication lines.

13. The method of claim 12 , wherein the differential communication line comprises at least one alternating current (AC) coupling capacitor.

14. The method of claim 11 , wherein the DC balance code comprises a Manchester code.

15. The method of claim 11 , wherein the DC balance code comprises an 8B10B code.

16. The method of claim 11 , wherein the configuration data signal comprises configuration data used for setting up a communication environment for receiving the data transmitted by the first integrated circuit at the second transmission rate.

17. The method of claim 16 , wherein the configuration data signal further comprises header data corresponding to information related to the configuration data.

18. The method of claim 16 , wherein the configuration data signal further comprises checksum data.

19. The method of claim 16 , wherein the configuration data signal further comprises a start bit disposed before the configuration data.

20. The method of claim 16 , wherein the configuration data signal further comprises an end bit disposed after the configuration data.

Assignees

• Silicon Works Co Ltd

Inventors

• Kim Do Seok
• Mun Yong Hwan
• Kim Myung Yu
• Cho Hyun Pyo

Classifications

• G09G3/20 Primary

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

• G09G2310/0275

  Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current · CPC title

• G09G2370/08

  Details of image data interface between the display device controller and the data line driver circuit · CPC title

• G09G5/008 Primary

  Clock recovery · CPC title

• G09G3/3275 Primary

  Details of drivers for data electrodes · CPC title