Singulation of silicon carbide semiconductor wafers

US11942327B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11942327-B2
Application numberUS-202217659388-A
CountryUS
Kind codeB2
Filing dateApr 15, 2022
Priority dateMay 9, 2018
Publication dateMar 26, 2024
Grant dateMar 26, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of singulating a silicon carbide (SiC) semiconductor wafer can include defining a cut within the silicon carbide (SiC) semiconductor wafer by performing a partial dicing operation where the SiC semiconductor wafer is aligned along a plane and the cut has a depth less than a first thickness of the SiC semiconductor wafer. The cut is aligned along a vertical direction orthogonal to the plane such that a portion of the SiC semiconductor wafer has a second thickness that extends between a bottom of the cut and an outer surface of the SiC semiconductor wafer. The method can further include defining a cleave, by performing a cleaving operation, through the portion of the SiC semiconductor wafer having the second thickness. The cleave can be aligned with the cut and extending to the outer surface of the SiC semiconductor wafer.

First claim

Opening claim text (preview).

What is claimed is: 1. A system, comprising: a wafer chuck, the wafer chuck being configured to receive a silicon carbide (SiC) semiconductor wafer thinned to a first thickness to produce a thinned SiC semiconductor wafer, a first surface of the thinned SiC semiconductor wafer being aligned along a plane; a dicing apparatus configured to perform a partial dicing operation on the first surface of the thinned SiC semiconductor wafer to define a cut within the thinned SiC semiconductor wafer to produce a partially diced SiC semiconductor wafer, the cut having a depth less than the first thickness of the thinned SiC semiconductor wafer, the cut being aligned along a vertical direction orthogonal to the plane, the cut being aligned such that a portion of the thinned SiC semiconductor wafer has a second thickness that extends between a bottom of the cut and a second surface of the thinned SiC semiconductor wafer, the second surface being opposite the first surface; and a cleaving apparatus, the cleaving apparatus being configured to perform a cleaving operation on the second surface of the partially diced SiC semiconductor wafer, through the portion of the partially diced SiC semiconductor wafer having the second thickness, along the vertical direction to define a cleave, the cleave being aligned with the cut and extending to the second surface of the partially diced SiC semiconductor wafer. 2. The system of claim 1 , wherein the depth is between 65% and 75% of the first thickness of the thinned SiC semiconductor wafer. 3. The system of claim 1 , wherein the cut has a first width in a direction parallel to the plane and the cleave has a second width in the direction parallel to the plane, the first width being greater than the second width, and the cut and the cleave are used to define a set of SiC die, each of the set of SiC die having a step, the step having a width in the direction parallel to the plane based on a difference between the first width and the second width. 4. The system of claim 1 , further comprising: a backmetal deposition apparatus, the backmetal deposition apparatus being configured to perform a backmetal deposition operation on the partially diced SiC semiconductor wafer prior to performing the cleaving operation. 5. The system of claim 1 , wherein performing the cleaving operation includes: applying a cleaving force to the partially diced SiC semiconductor wafer along the cut using an impulse bar. 6. The system of claim 1 , wherein the dicing apparatus includes a laser ablation tool, the dicing apparatus configured to cut through the thinned SiC semiconductor wafer at the depth, a power of the laser ablation tool being defined to enable the laser ablation tool to define the cut having the depth. 7. The system of claim 1 , wherein the dicing apparatus includes a mechanical saw tool, the mechanical saw tool configured to cut through the thinned SiC semiconductor wafer at the depth, the mechanical saw tool including a saw blade having a position to define the cut at the depth. 8. The system of claim 1 , further comprising: an automated transfer device having an end effector, the end effector being configured to apply a transfer force to the partially diced SiC semiconductor wafer to transfer the partially diced SiC semiconductor wafer from the dicing apparatus to the cleaving apparatus, the transfer force being based on the depth. 9. A system configured to separate a die in a silicon carbide (SiC) semiconductor wafer, comprising: a cutting apparatus including: a cutting tool configured to perform a cutting operation on a first surface of the SiC semiconductor wafer in a gap between die sections to produce a cut that results in a cut SiC semiconductor wafer; and a controller configured to control the cutting tool such that the cut produced by the cutting tool has a specified depth through a portion of a thickness of the SiC semiconductor wafer and a specified width in the gap between the die sections; and a cleaving apparatus configured to perform a cleaving operation on the cut SiC semiconductor wafer on a second surface of the SiC semiconductor wafer after the cutting operation has been performed on the SiC semiconductor wafer to produce a cleave that results in a separated die, the second surface being opposite the first surface. 10. The system as in claim 9 , wherein the controller includes an electronic component configured to move the cutting tool over the SiC semiconductor wafer according to a dwell schedule. 11. The system as in claim 9 , wherein the cutting tool includes a mechanical saw blade. 12. The system as in claim 11 , wherein the mechanical saw blade is one of a nickel bond dicing blade, a hubless resinoid blade, a hubbed resinoid blade, or a metal sintered dicing blade. 13. The system as in claim 11 , wherein the controller includes an electronic control component configured to position the mechanical saw blade along an axis normal to the first surface of the SiC semiconductor wafer such that the mechanical saw blade performs the cutting operation on the first surface of the SiC semiconductor wafer at the portion of the thickness of the SiC semiconductor wafer. 14. The system as in claim 9 , wherein the cutting tool includes a laser ablation tool, and wherein the cutting operation includes a scribing operation performed by the laser ablation tool to produce the cut through a portion of the thickness of the SiC semiconductor wafer between the die sections. 15. The system as in claim 14 , wherein the laser ablation tool includes a short-pulse laser and a focusing lens. 16. The system as in claim 15 , wherein the short-pulse laser has a wavelength of less than 400 nm. 17. The system as in claim 15 , wherein the controller includes an electronic control component configured to adjust a power of the short-pulse laser to produce a cut having a specified depth through the thickness of the SiC semiconductor wafer. 18. The system as in claim 15 , wherein the controller includes an electronic control component configured to adjust a position of the focusing lens to produce the cut having the specified depth through the thickness of the SiC semiconductor wafer. 19. The system as in claim 9 , wherein the controller includes an electronic control component configured to adjust a number of passes across the SiC semiconductor wafer to produce the cut having the specified width in the gap between the die sections. 20. The system as in claim 9 , wherein the cleaving apparatus includes an impulse bar configured to cleave the perform the cleaving operation on the SiC semiconductor wafer at a specified location on the second surface of the SiC semiconductor wafer.

Assignees

Inventors

Classifications

  • H10P52/00Primary

    Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title

  • Cutting or separating of wafers, substrates or parts of devices · CPC title

  • Apparatus for mechanical treatment or grinding or cutting · CPC title

  • Silicon carbide · CPC title

  • Diamond · CPC title

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Frequently asked questions

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What does patent US11942327B2 cover?
A method of singulating a silicon carbide (SiC) semiconductor wafer can include defining a cut within the silicon carbide (SiC) semiconductor wafer by performing a partial dicing operation where the SiC semiconductor wafer is aligned along a plane and the cut has a depth less than a first thickness of the SiC semiconductor wafer. The cut is aligned along a vertical direction orthogonal to the p…
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H10P52/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 26 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).