Closing block family based on soft and hard closure criteria

US11940892B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11940892-B2
Application numberUS-202217868008-A
CountryUS
Kind codeB2
Filing dateJul 19, 2022
Priority dateDec 19, 2019
Publication dateMar 26, 2024
Grant dateMar 26, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is to perform operations, including initializing a block family associated with the memory device; aggregating temperature values received from one or more temperature sensors of the memory device over time to determine an aggregate temperature; responsive to beginning to program a block residing on the memory device, associating the block with the block family; and in response to the aggregate temperature being greater than or equal to a specified threshold temperature value: performing a soft closure of the block family; initializing an extension timer; continuing to program data to the block; and performing a hard closure of the block family in response to one of the extension timer reaching an extension time value or the block family satisfying a hard closure criteria.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: a memory device including temperature sensors; and a processing device, operatively coupled to the memory device, the processing device to perform operations, comprising: initializing a block family associated with the memory device; aggregating a plurality of temperature values received from one or more of the temperature sensors of the memory device over time to determine an aggregate temperature; responsive to beginning to program a block residing on the memory device, associating the block with the block family; and in response to the aggregate temperature being greater than or equal to a specified threshold temperature value: performing a soft closure of the block family; initializing an extension timer; continuing to program data to the block; and performing a hard closure of the block family in response to one of the extension timer reaching an extension time value or the block family satisfying a hard closure criteria. 2. The system of claim 1 , wherein the operations further comprise: measuring an opening temperature of the memory device at initialization of the block family; and wherein aggregating comprises determining a temperature metric value by integrating, over time, an absolute temperature difference between the opening temperature and an immediate temperature of the memory device. 3. The system of claim 1 , wherein the operations further comprise setting the extension time value based on at least one of a workload of the processing device, an immediate reference temperature for the block family, or a performance expectation of the processing device. 4. The system of claim 1 , wherein the operations further comprise evaluating the hard closure criteria by: determining an amount of time until filling the block completely with the data being received from a host system; and deciding whether to finish programming the block based on the amount of time and a remainder of time left until the timer reaches the extension time value. 5. The system of claim 4 , wherein the operations further comprise, in response to deciding to not finish programming the block, one of: leaving empty an unwritten portion of the block; or writing dummy data to the unwritten portion of the block. 6. The system of claim 4 , wherein the operations further comprise, in response to deciding to not finish programming the block: creating a first partition of a written portion of the block; associating the first partition with the block family; and creating a second partition of an unwritten portion of the block for association with a new block family. 7. The system of claim 4 , wherein, in response to deciding to finish programming the block, the operations further comprise finish programming the block with the data received from the host system before performing the hard closure of the block family. 8. The system of claim 1 , wherein the operations further comprise: detecting a bit error rate of a previously closed block family that employed the extension time value, wherein the bit error rate is above a threshold acceptable bit error rate; and reducing the extension time value by an amount of time calculated to reduce the bit error rate to below the threshold acceptable bit error rate. 9. The system of claim 1 , wherein the operations further comprise: detecting a write amplification of a previously closed block family that employed the extension time value, wherein the write amplification is above a threshold acceptable write amplification; and increasing the extension time value by an amount of time calculated to reduce the write amplification to below the threshold acceptable write amplification. 10. A method comprising: initializing, by a processing device, a block family associated with a memory device; aggregating a plurality of temperature values received from one or more temperature sensors of the memory device over time to determine an aggregate temperature; responsive to beginning to program a block residing on the memory device, associating the block with the block family; and in response to the aggregate temperature being greater than or equal to a specified threshold temperature value: performing a soft closure of the block family; initializing an extension timer; continuing to program data to the block; and performing a hard closure of the block family in response to one of the extension timer reaching an extension time value or the block family satisfying a hard closure criteria. 11. The method of claim 10 , further comprising: measuring an opening temperature of the memory device at initialization of the block family; and wherein aggregating comprises determining a temperature metric value by integrating, over time, an absolute temperature difference between the opening temperature and an immediate temperature of the memory device. 12. The method of claim 10 , further comprising setting the extension time value based on at least one of a workload of the processing device, an immediate reference temperature for the block family, or a performance expectation of the processing device. 13. The method of claim 10 , further comprising evaluating the hard closure criteria by: determining an amount of time until filling the block completely with data being received from a host system; and deciding whether to finish programming the block based on the amount of time and a remainder of time left until the extension timer reaches the extension time value. 14. The method of claim 13 , further comprising, in response to deciding to not finish programming the block, one of: leaving empty an unwritten portion of the block; or writing dummy data to the unwritten portion of the block. 15. The method of claim 13 , further comprising, in response to deciding to not finish programming the block: creating a first partition of a written portion of the block; associating the first partition with the block family; and creating a second partition of an unwritten portion of the block for association with a new block family. 16. The method of claim 13 , further comprising, in response to deciding to finish programming the block, finish programming the block with the data received from the host system before performing the hard closure of the block family. 17. The method of claim 10 , further comprising: detecting a bit error rate of a previously closed block family that employed the extension time value, wherein the bit error rate is above a threshold acceptable bit error rate; and reducing the extension time value by an amount of time calculated to reduce the bit error rate to below the threshold acceptable bit error rate. 18. The method of claim 10 , further comprising: detecting a write amplification of a previously closed block family that employed the extension time value, wherein the write amplification is above a threshold acceptable write amplification; and increasing the extension time value by an amount of time calculated to reduce the write amplification to below the threshold acceptable write amplification. 19. A non-transitory computer-readable storage medium that stores instructions, which when executed by a processing device of a memory device, cause the processing device to perform operations comprising: initializing a block family associated with the memory device; aggregating a plurality of temperature values received from one or more temperature sensors of the memory device over time to determine an aggregate temperature; re

Assignees

Inventors

Classifications

  • where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00) · CPC title

  • in relation to data integrity, e.g. data losses, bit errors · CPC title

  • G06F3/064Primary

    Management of blocks · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • by exceeding a time limit, i.e. time-out, e.g. watchdogs · CPC title

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What does patent US11940892B2 cover?
A system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is to perform operations, including initializing a block family associated with the memory device; aggregating temperature values received from one or more temperature sensors of the memory device over time to determine an aggregate temperature; responsive to beginning to p…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification G06F11/3037. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 26 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).