High power device fault localization via die surface contouring

Patent metadata

Field	Value
Publication number	US-11940271-B2
Application number	US-202016950855-A
Country	US
Kind code	B2
Filing date	Nov 17, 2020
Priority date	Nov 17, 2020
Publication date	Mar 26, 2024
Grant date	Mar 26, 2024

Abstract

A method of preparing a computer processor die includes determining a warpage shape of the computer processor die at a testing temperature. The method also includes selectively contouring a thickness of the computer processor die at a contouring temperature by physically removing material from a surface of the computer processor die such that the surface will be substantially flat at the testing temperature.

First claim

What is claimed is:

1. A method of preparing a computer processor die, the method comprising:
determining a first warpage shape of the computer processor die at a testing temperature; and
contouring, selectively, a thickness of the computer processor die at a contouring temperature by physically removing material from a surface of the computer processor die such that the surface will be substantially flat at the testing temperature;
wherein the contouring temperature is room temperature.

2. The method of claim 1 , further comprising:
determining an operating temperature of the computer processor die;
wherein the testing temperature is within 10 degrees Celsius of the operating temperature.

3. The method of claim 1 , further comprising:
testing the computer processor die at the testing temperature by operating the computer processor die.

4. The method of claim 3 , further comprising:
contacting the surface of the computer processor die with a cooling plate;
cooling the computer processor die during the testing of the computer processor die using the cooling plate.

5. The method of claim 1 , wherein contouring, selectively, the thickness of the computer processing die is performed based on the first warpage shape.

6. The method of claim 1 , wherein determining the first warpage shape comprises:
creating a first virtual model of the computer processor die using finite element analysis; and
contouring, selectively, the first virtual model to create a second virtual model such that a virtual surface of the second virtual model will be substantially flat at the testing temperature.

7. The method of claim 6 , further comprising:
determining a second warpage shape of a second virtual model at the testing temperature; and
selectively thinning and/or thickening the second virtual model to create a third virtual model such that the virtual surface will be substantially flat at the testing temperature.

8. The method of claim 7 , wherein contouring, selectively, the thickness of the computer processing die is performed based on the third virtual model.

9. The method of claim 1 , wherein the testing temperature is higher than the contouring temperature.

10. A method of preparing a computer processor die for testing, the method comprising:
heating the computer processor die to an initial temperature;
attaching a shaping material to the computer processor die to maintain a shape of the computer processor die near the initial temperature wherein attaching comprises:
pouring the shaping material between a stud and the computer processor die; and
allowing the shaping material to solidify, dry, and/or cure;

contouring, selectively, a thickness of the computer processor die by physically removing material from a surface of the computer processor die; and
separating the computer processor die from the shaping material.

11. The method of claim 10 , further comprising:
determining an operating temperature of the computer processor die;
wherein the initial temperature is within 10 degrees Celsius of the operating temperature.

12. The method of claim 10 , further comprising:
testing the computer processor die at a testing temperature by operating the computer processor die.

13. The method of claim 12 , further comprising:
contacting the surface of the computer processor die with a cooling plate;
cooling the computer processor die during the testing of the computer processor die using the cooling plate.

14. The method of claim 10 , further comprising:
heating the shaping material above a solidification temperature of the shaping material.

15. The method of claim 14 , wherein the heated shaping material heats the computer processor die to the initial temperature.

16. The method of claim 10 , wherein the computer processor die is heated to the initial temperature by operating the computer processor die.

17. The method of claim 10 , wherein contouring, selectively, the thickness of the computer processor die by physically removing material from the surface of the computer processor die comprises flattening the surface.

18. The method of claim 10 , wherein separating the computer processor die from the shaping material comprises at least one of the group consisting of: heating the shaping material and dissolving the shaping material.

19. The method of claim 10 , wherein the shaping material is a wax.

20. A system comprising:
a computer processor die;
a laminate material connected to the computer processor die;
a daughter card electrically connected to the computer processor die to energize the computer processor die;
a solid immersion lens in contact with a backside of the computer processor die; and
a cooling plate in contact with the backside of the computer processor die;
wherein the backside of the computer processor die is substantially flat at an operating temperature of the computer processor die.

Assignees

• IBM

Inventors

• Lewison David J
• Bunt Jay A
• Pompeo Frank L
• Oldrey Richard Walter
• Sylvestri John D
• Tran Phong T

Classifications

• H10P72/0604

  Process monitoring, e.g. flow or thickness monitoring · CPC title

• H10W40/22

  characterised by their shape, e.g. having conical or cylindrical projections · CPC title

• H10P95/00

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10P74/207

  Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics · CPC title

• H10P74/23 Primary

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title