Display substrate and display device

Patent metadata

Field	Value
Publication number	US-11922879-B2
Application number	US-202318194348-A
Country	US
Kind code	B2
Filing date	Mar 31, 2023
Priority date	Sep 30, 2017
Publication date	Mar 5, 2024
Grant date	Mar 5, 2024

Abstract

A display substrate and a display device. The display substrate includes a pixel circuit in which the driving circuit controls a driving current for driving the light emitter element to emit light; the first light emission control circuit applies a first voltage to a first terminal of the driving circuit in response to a first light emission control signal; the second light emission control circuit applies the driving current to the light emitter element in response to a second light emission control signal; the first reset circuit applies a first reset voltage to the control terminal of the driving circuit in response to a first reset signal; the first reset signal and the first light emission control signal are simultaneously turn-on signals during a period; the first light emission control line and the second light emission control line extend along a first direction and are arranged in a second direction.

First claim

What is claimed is:

1. A display substrate comprising:
a base substrate;
a sub-pixel, provided on the base substrate and comprising a pixel circuit, wherein the pixel circuit comprises: a driving circuit, a data writing circuit, a first light emission control circuit, a first light emission control line and a light emitter element,
the driving circuit comprises a control terminal, a first terminal and a second terminal, and the driving circuit is configured to control a driving current, which passes through the first terminal and the second terminal, for driving the light emitter element to emit light;
the data writing circuit is configured to write a data signal to the driving circuit in response to a scan signal;
the first light emission control circuit is configured to apply a first voltage to the first terminal of the driving circuit in response to a first light emission control signal provided by the first light emission control line in an initialization stage; and
the first light emission control line extends along a first direction, and a second direction intersects with the first direction; in the second direction, an orthographic projection of the first light emission control circuit on the base substrate is at a side of an orthographic projection of the driving circuit on the base substrate away from an orthographic projection of the data writing circuit on the base substrate;
the display substrate further comprises:
a second light emission control circuit, configured to apply the driving current to the light emitter element in response to a second light emission control signal; and
a second light emission control line, configured to provide the second light emission control signal, wherein
the first light emission control line and the second light emission control line extend along a same direction;
the first light emission control line and the second light emission control line are two different lines arranged in the second direction and do not overlap with each other in a direction perpendicular to the base substrate.

2. The display substrate according to claim 1 , wherein the first light emission control circuit comprises a first light emission control transistor, a gate electrode of the first light emission control transistor is connected with the first light emission control line to receive the first light emission control signal, a first electrode of the first light emission control transistor is connected with a first voltage terminal to receive a first voltage, and a second electrode of the first light emission control transistor is connected with the first terminal of the driving circuit;
an electrode in which an active layer of the first light emission control transistor is located extends along the second direction.

3. The display substrate according to claim 2 , wherein in the second direction, both an orthographic projection of the first light emission control line and an orthographic projection of the second light emission control line on the base substrate are at a side of the orthographic projection of the driving circuit on the base substrate away from the orthographic projection of the data writing circuit on the base substrate.

4. The display substrate according to claim 2 , wherein the first light emission control signal and the second light emission control signal that are respectively applied to the first light emission control line and the second light emission control line are different during at least a period of time.

5. The display substrate according to claim 2 , wherein the pixel circuit further comprises: a first reset circuit, configured to apply a first reset voltage to the control terminal of the driving circuit in response to a first reset signal, and the first reset signal and the first light emission control signal are simultaneously turn-on signals during at least a period of time.

6. The display substrate according to claim 5 , wherein the second light emission control circuit comprises a second light emission control transistor;
in the second direction, both an orthographic projection of the first light emission control transistor on the base substrate and an orthographic projection of the second light emission control transistor on the base substrate are at a side of the orthographic projection of the driving circuit on the base substrate away from the orthographic projection of the data writing circuit on the base substrate.

7. The display substrate according to claim 5 , wherein the driving circuit comprises a driving transistor, a gate electrode of the driving transistor serves as the control terminal of the driving circuit, a first electrode of the driving transistor serves as the first terminal of the driving circuit, and a second electrode of the driving transistor serves as the second terminal of the driving circuit;
the first reset circuit comprises a first reset transistor, a gate electrode of the first reset transistor is connected to a first reset control terminal to receive the first reset signal, a first electrode of the first reset transistor is connected to the control terminal of the driving circuit, and a second electrode of the first reset transistor is connected to a reset voltage terminal to receive the first reset voltage;
an electrode in which an active layer of the first reset transistor is located and an electrode in which an active layer of the driving transistor is located are spaced apart with each other and are not a continuous integral structure.

8. The display substrate according to claim 6 , further comprising:
a compensation circuit, electrically connected with the control terminal of the driving circuit and the second terminal of the driving circuit, and configured to store the data signal that is written in and compensate the driving circuit in response to a scan signal, wherein
the compensation circuit comprises a compensation transistor and a storage capacitor, wherein a gate electrode of the compensation transistor is connected with a scan signal terminal to receive the scan signal, a first electrode of the compensation transistor is connected with the second terminal of the driving circuit, a second electrode of the compensation transistor is connected with a first electrode plate of the storage capacitor, and a second electrode plate of the storage capacitor is connected with the first voltage terminal;
in the second direction, an orthographic projection of the compensation transistor on the base substrate is at a side of the orthographic projection of the driving circuit on the base substrate away from the orthographic projection of the first light emission control circuit on the base substrate.

9. The display substrate according to claim 8 , wherein the data writing circuit comprises a data writing transistor, a gate electrode of the data writing transistor is connected to the scan signal terminal to receive the scan signal, a first electrode of the data writing transistor is connected to a data signal terminal to receive the data signal, and a second electrode of the data writing transistor is connected to the first terminal of the driving circuit;
an orthographic projection of part of a channel region of the compensation transistor on the base substrate is at a side of an orthographic projection of the data writing transistor on the base substrate away from the orthographic projection of the driving circuit on the base substrate.

10. The display substrate according to claim 8 , wherein both the first light emission control line and the second light emission control line are arranged in a same layer as the first electrode plate of the storage capacitor.

11. The display substrate according to cl

Assignees

• Boe Technology Group Co Ltd

Inventors

• Gao Xueling
• Peng Kuanjun
• Yang Chengchung
• Zou Xiangxiang
• Qin Wei

Classifications

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• H10K59/121

  characterised by the geometry or disposition of pixel elements · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title