Display apparatus

Patent metadata

Field	Value
Publication number	US-2015262526-A1
Application number	US-201414466867-A
Country	US
Kind code	A1
Filing date	Aug 22, 2014
Priority date	Mar 12, 2014
Publication date	Sep 17, 2015
Grant date	—

Abstract

A display apparatus includes: pixels at a display area; dummy pixels at a dummy area; and repair lines coupled to the dummy pixels and connectably arranged to the pixels, each of the dummy pixels including: a driving transistor configured to output a driving current corresponding to a data signal applied to a gate electrode thereof; an emission control transistor between a connection node of a corresponding repair line of the repair lines and the driving transistor, configured to be controlled by an emission control signal; a bypass transistor between the connection node and a first initialization voltage line through which a first initialization voltage is supplied, configured to be controlled by an initialization control signal; and a coupling removal transistor between the connection node and the first initialization voltage line, configured to be controlled by a coupling control signal applied at a different timing from the initialization control signal.

First claim

What is claimed is:

1 . A display apparatus comprising:
a plurality of pixels at a display area; a plurality of dummy pixels at a dummy area; and a plurality of repair lines coupled to the plurality of dummy pixels and connectably arranged to the plurality of pixels, wherein each of the dummy pixels comprises:
a driving transistor configured to output a driving current corresponding to a data signal applied to a gate electrode thereof;
an emission control transistor coupled between a connection node of a corresponding repair line from among the plurality of repair lines and the driving transistor, the emission control transistor being configured to be controlled by an emission control signal;
a bypass transistor coupled between the connection node and a first initialization voltage line through which a first initialization voltage is supplied, the bypass transistor being configured to be controlled by an initialization control signal; and
a coupling removal transistor coupled between the connection node and the first initialization voltage line, the coupling removal transistor being configured to be controlled by a coupling control signal applied at a different timing from the initialization control signal.

2 . The display apparatus of claim 1 , wherein when one of the plurality of dummy pixels is coupled to a defective pixel of the plurality of pixels through a corresponding first repair line of the repair lines, the coupling control signal for turning on the coupling removal transistor is applied in correspondence with a level change time point of a control signal applied to first pixels of the plurality of pixels, which are arranged along the first repair line, through at least one control line arranged in parallel with the first repair line, or in correspondence with an emission time point of the first pixels.

3 . The display apparatus of claim 1 , wherein the each of the dummy pixels further comprises:
an initialization transistor coupled between the gate electrode of the driving transistor and the first initialization voltage line, the initialization transistor being configured to be controlled by the initialization control signal; a switching transistor coupled between a data line through which the data signal is applied and a first electrode of the driving transistor, the switching transistor being configured to be controlled by a scan signal; and a compensation transistor coupled between the gate electrode and a second electrode of the driving transistor, the compensation transistor being configured to be controlled by the scan signal.

4 . The display apparatus of claim 3 , wherein the coupling control signal is the scan signal, a first next scan signal following the scan signal after one unit of time, or a second next scan signal following the scan signal after two units of time.

5 . The display apparatus of claim 3 , wherein, in each of the dummy pixels, the initialization transistor and the bypass transistor are configured to be turned on during an initialization period and to initialize the gate electrode of the driving transistor and the corresponding repair line coupled to the connection node,
the switching transistor and the compensation transistor are configured to be turned on during a data write period and to apply a dummy data signal in which a threshold value of the driving transistor is compensated for to the gate electrode of the driving transistor, the emission control transistor is configured to be turned on during an emission period and to output the driving current to the corresponding repair line, and the coupling removal transistor is turned on during a coupling removal period and to remove a coupling voltage from the initialized corresponding repair line.

6 . The display apparatus of claim 1 , wherein each of the pixels comprises:
a second driving transistor configured to output a driving current corresponding to a data signal applied to a gate electrode thereof; a second emission control transistor coupled between the second driving transistor and a light-emitting device, the second emission transistor being configured to be controlled by a second emission control signal; a second bypass transistor coupled between the light-emitting device and a second initialization voltage line through which a second initialization voltage is supplied, the second bypass transistor being configured to be controlled by a second initialization control signal; a second initialization transistor coupled between the gate electrode of the second driving transistor and the second initialization voltage line, the second initialization transistor being configured to be controlled by the second initialization control signal; a second switching transistor coupled between a data line through which the data signal is applied and a first electrode of the second driving transistor, the second switching transistor being configured to be controlled by a second scan signal; and a second compensation transistor coupled between the gate electrode and a second electrode of the second driving transistor, the second compensation transistor being configured to be controlled by the second scan signal, wherein the second initialization voltage is higher than the first initialization voltage.

7 . The display apparatus of claim 6 , wherein the second emission control signal is an nth emission control signal, and the emission control signal is the nth emission control signal or an (n+1)th emission control signal,
the second initialization control signal is an nth initialization control signal, and the initialization control signal is the nth initialization control signal or an (n+1)th initialization control signal, and the second scan signal and the scan signal are an nth scan signal.

8 . The display apparatus of claim 1 , wherein each of the dummy pixels further comprises a boost capacitor coupled between a gate electrode of the coupling removal transistor and the corresponding repair line.

9 . The display apparatus of claim 8 , wherein each of the dummy pixels further comprises:
an initialization transistor coupled between the gate electrode of the driving transistor and the first initialization voltage line, the initialization transistor being configured to be controlled by the initialization control signal; a switching transistor coupled between a data line through which the dummy data signal is applied and a first electrode of the driving transistor, the switching transistor being configured to be controlled by a scan signal; and a compensation transistor coupled between the gate electrode and a second electrode of the driving transistor, the compensation transistor being configured to be controlled by the scan signal.

10 . The display apparatus of claim 9 , wherein the coupling control signal is the scan signal, a first next scan signal following the scan signal after one unit of time, or a second next scan signal following the scan signal after two units of time.

11 . The display apparatus of claim 9 , wherein in each of the dummy pixels, the initialization transistor and the bypass transistor are configured to be turned on during an initialization period and to initialize the gate electrode of the driving transistor and the corresponding repair line coupled to the connection node,
the switching transistor and the compensation transistor are configured to be turned on during a data write period and to apply a dummy data signal in which a threshold value of the driving transistor is compensated to the gate electrode of the driving transistor, the emission control transistor is configured to be turned on during an emission period and to output the driving

Assignees

• Samsung Display Co Ltd

Inventors

• Park Kyoung-Tae
• Kim Tae-Gon
• So Warrick
• Cho Sung-Ho

Classifications

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2300/0413

  Details of dummy pixels or dummy lines in flat panels · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

• G09G2330/08

  Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title