Semiconductor device and method for manufacturing the same

US11915924B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11915924-B2
Application numberUS-202017030874-A
CountryUS
Kind codeB2
Filing dateSep 24, 2020
Priority dateApr 24, 2018
Publication dateFeb 27, 2024
Grant dateFeb 27, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A recess is formed in one silicon substrate. A silicon oxide film is formed in another one silicon substrate at a portion space apart from a space-to-be-formed region. The silicon oxide film has a groove surrounding the space-to-be-formed region and extending to an outer periphery of the other one silicon substrate. Further, the other one silicon substrate and the one silicon substrate are directly bonded to each other via the silicon oxide film so as to cover the groove. A gas discharge passage, a stacking structure of the silicon substrates and the silicon oxide film are formed, and the space is formed inside the stacking structure by the recess. Then, by the heat treatment, the gas inside the space is discharged to the outside of the stacking structure through the gas discharge passage.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device having a space therein, comprising: a support layer made of silicon; an activation layer made of silicon, having an element portion, and bonded to the support layer via a first silicon oxide film layer; and a cap portion made of silicon, bonded to the activation layer via a second silicon oxide film layer, and having a recess disposed at a position corresponding to the element portion, wherein: the support layer, the first silicon oxide film layer, the activation layer, the second silicon oxide film layer, and the cap portion provide a stacking structure, and the recess provides the space inside the stacking structure, the semiconductor device further comprising: a gas discharge passage only arranged in one of the first silicon oxide film layer sandwiched between the support layer and the activation layer and the second silicon oxide film layer sandwiched between the activation layer and the cap portion, surrounding the space, and reaching an outer periphery of the activation layer, wherein: the gas discharge passage is provided by a hole arranged in one of the first silicon oxide film layer and the second silicon oxide film layer; and the hole is sealed in a thickness direction cross-section of the stacking structure. 2. The semiconductor device according to claim 1 , wherein: the space has a pressure therein equal to or less than 100 Pa and equal to or larger than 10 Pa. 3. A semiconductor device having a space therein, comprising: a support layer made of silicon; an activation layer made of silicon, having an element portion, and bonded to the support layer via a first silicon oxide film layer; and a cap portion made of silicon, bonded to the activation layer via a second silicon oxide film layer, and having a recess disposed at a position corresponding to the element portion, wherein: the support layer, the first silicon oxide film layer, the activation layer, the second silicon oxide film layer, and the cap portion provide a stacking structure, and the recess provides the space inside the stacking structure, the semiconductor device further comprising: a gas discharge passage only arranged in one of the first silicon oxide film layer sandwiched between the support layer and the activation layer and the second silicon oxide film layer sandwiched between the activation layer and the cap portion, surrounding the space, and reaching an outer periphery of the activation layer, wherein: the gas discharge passage is arranged in the first silicon oxide film layer; the support layer and the activation layer are exposed from the first silicon oxide film layer at a position where the gas discharge passage is arranged; the gas discharge passage is provided by a hole surrounded by the support layer, the activation layer and the first silicon oxide film layer; the hole is arranged in the first silicon oxide film layer; a height of the hole is equal to a thickness of the first silicon oxide film layer; and the hole is sealed in a thickness direction cross-section of the stacking structure. 4. A semiconductor device having a space therein, comprising: a support layer made of silicon; an activation layer made of silicon, having an element portion, and bonded to the support layer via a first silicon oxide film layer; and a cap portion made of silicon, bonded to the activation layer via a second silicon oxide film layer, and having a recess disposed at a position corresponding to the element portion, wherein: the support layer, the first silicon oxide film layer, the activation layer, the second silicon oxide film layer, and the cap portion provide a stacking structure, and the recess provides the space inside the stacking structure, the semiconductor device further comprising: a gas discharge passage only arranged in one of the first silicon oxide film layer sandwiched between the support layer and the activation layer and the second silicon oxide film layer sandwiched between the activation layer and the cap portion, surrounding the space, and reaching an outer periphery of the activation layer, wherein: the gas discharge passage is arranged in the second silicon oxide film layer; the cap portion and the activation layer are exposed from the second silicon oxide film layer at a position where the gas discharge passage is arranged; the gas discharge passage is provided by a hole surrounded by the cap portion, the activation layer and the second silicon oxide film layer; the hole is arranged in the second silicon oxide film layer; a height of the hole is equal to a thickness of the second silicon oxide film layer; and the hole is sealed in a thickness direction cross-section of the stacking structure. 5. A semiconductor device having a space therein, comprising: a support layer made of silicon; an activation layer made of silicon, having an element portion, and bonded to the support layer via a first silicon oxide film layer; and a cap portion made of silicon, bonded to the activation layer via a second silicon oxide film layer, and having a recess disposed at a position corresponding to the element portion, wherein: the support layer, the first silicon oxide film layer, the activation layer, the second silicon oxide film layer, and the cap portion provide a stacking structure, and the recess provides the space inside the stacking structure, the semiconductor device further comprising: a gas discharge passage only arranged in one of the first silicon oxide film layer sandwiched between the support layer and the activation layer and the second silicon oxide film layer sandwiched between the activation layer and the cap portion, surrounding the space, and reaching an outer periphery of the activation layer, wherein: the gas discharge passage is arranged in the first silicon oxide film layer; the first silicon oxide film layer covers the support layer and the activation layer at a position where the gas discharge passage is arranged; the gas discharge passage is arranged at a position spaced apart from the support layer and the activation layer; the gas discharge passage is provided by a hole arranged in the first silicon oxide film layer; a height of the hole is smaller than a thickness of the first silicon oxide film layer; and the hole is surrounded by the first silicon oxide film layer and sealed in a thickness direction cross-section of the stacking structure. 6. A semiconductor device having a space therein, comprising: a support layer made of silicon; an activation layer made of silicon, having an element portion, and bonded to the support layer via a first silicon oxide film layer; and a cap portion made of silicon, bonded to the activation layer via a second silicon oxide film layer, and having a recess disposed at a position corresponding to the element portion, wherein: the support layer, the first silicon oxide film layer, the activation layer, the second silicon oxide film layer, and the cap portion provide a stacking structure, and the recess provides the space inside the stacking structure, the semiconductor device further comprising: a gas discharge passage only arranged in one of the first silicon oxide film layer sandwiched between the support layer and the activation layer and the second silicon oxide film layer sandwiched between the activation layer and the cap portion, surrounding the space, and reaching an outer periphery of the activation layer, wherein: the gas discharge passage is arranged in the second silicon oxide film layer; the second silicon oxide film layer covers the cap portion and the activation layer at a position where the gas discharge passage is arranged; the gas discharge passage is arranged at a position spaced apart from the cap portion the activation layer; the

Assignees

Inventors

Classifications

  • by chemical means · CPC title

  • Seals · CPC title

  • Insulating materials, e.g. resins, glasses or ceramics · CPC title

  • the material being a silicon oxide, e.g. SiO2 · CPC title

  • Devices controlled by mechanical forces, e.g. pressure · CPC title

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Frequently asked questions

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What does patent US11915924B2 cover?
A recess is formed in one silicon substrate. A silicon oxide film is formed in another one silicon substrate at a portion space apart from a space-to-be-formed region. The silicon oxide film has a groove surrounding the space-to-be-formed region and extending to an outer periphery of the other one silicon substrate. Further, the other one silicon substrate and the one silicon substrate are dire…
Who is the assignee on this patent?
Denso Corp, Toyota Chuo Kenkyusho Kk
What technology area does this patent fall under?
Primary CPC classification H10P14/69215. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 27 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).