Hybrid socket warp indicator

Patent metadata

Field	Value
Publication number	US-11906574-B2
Application number	US-202117369180-A
Country	US
Kind code	B2
Filing date	Jul 7, 2021
Priority date	Jul 7, 2021
Publication date	Feb 20, 2024
Grant date	Feb 20, 2024

Abstract

Aspects include a hybrid socket dynamic warp indicator for socket connector systems and methods of using the same to measure the warpage of a printed circuit board assembly. The method can include providing a printed circuit board having a plurality of pads and a socket. A warp indicator having a plurality of solder joint connections and a resistor array is electrically coupled to the printed circuit board to build a printed circuit board assembly. The printed circuit board assembly is subjected to a thermal event. A resistance across the resistor array is measured after the thermal event. A number of separations between one or more pads of the printed circuit board and one or more solder joint connections of the warp indicator is determined based on a change in the resistance. A defective warpage condition for the socket is determined based on the number of separations.

First claim

What is claimed is:

1. A method comprising:
forming a printed circuit board assembly comprising a warp indicator and a socket, the warp indicator comprising an element manufactured to be damaged when subjected to a predetermined amount of force, wherein the predetermined amount of force corresponds to an out-of-tolerance warpage of the printed circuit board;
subjecting the printed circuit board assembly to a thermal event, the thermal event resulting in the out-of-tolerance warpage of the printed circuit board and at least the predetermined amount of force being applied to the warp indicator, causing the element to fracture;
determining that the element was damaged during the thermal event, wherein determining that the element was damaged comprises visually inspecting the element to confirm the fracture, thereby allowing for a non-invasive visual confirmation that the socket was subjected to the out-of-tolerance warpage; and
in response to determining that the element was damaged, indicating a defective warpage condition for the printed circuit board assembly.

2. The method of claim 1 , wherein the element comprises a plastic beam.

3. The method of claim 2 , wherein the element is embedded within the socket of the printed circuit board assembly.

4. The method of claim 1 , wherein the thermal event is a solder reflow or rework.

5. The method of claim 1 , wherein the printed circuit board assembly further comprises a second warp indicator comprising a second element.

6. The method of claim 5 , wherein the second element is manufactured to break when subjected to a different predetermined amount of force.

7. The method of claim 5 , wherein the element is damaged during the thermal event and the second element is not damaged during the thermal event.

Assignees

• IBM

Inventors

• Hugo Stephen Michael
• Lewis Theron Lee
• Jennings Timothy
• Younger Timothy P
• Braun David J
• Bennett Jennifer I
• Dangler John R
• Bielick James D

Classifications

• G01R31/281 Primary

  Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing (G01R31/2818 takes precedence) · CPC title

• G01B7/20

  formed by printed-circuit technique · CPC title

• H01R12/57

  surface mounting terminals · CPC title

• H05K1/111

  Pads for surface mounting, e.g. lay-out · CPC title

• H05K3/4007

  Surface contacts, e.g. bumps (H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3465) · CPC title