Tribological properties of diamond films

Patent metadata

Field	Value
Publication number	US-11894230-B2
Application number	US-202318101317-A
Country	US
Kind code	B2
Filing date	Jan 25, 2023
Priority date	Aug 31, 2020
Publication date	Feb 6, 2024
Grant date	Feb 6, 2024

Abstract

Methods to manufacture integrated circuits are described. Nanocrystalline diamond is used as a hard mask in place of amorphous carbon. Provided is a method of processing a substrate in which nanocrystalline diamond is used as a hard mask, wherein processing methods result in a smooth surface. The method involves two processing parts. Two separate nanocrystalline diamond recipes are combined—the first and second recipes are cycled to achieve a nanocrystalline diamond hard mask having high hardness, high modulus, and a smooth surface. In other embodiments, the first recipe is followed by an inert gas plasma smoothening process and then the first recipe is cycled to achieve a high hardness, a high modulus, and a smooth surface.

First claim

What is claimed is:

1. A memory device comprising:
a memory stack comprising a plurality of alternating layers of a first material and a second material on a substrate;
a first nanocrystalline diamond layer on the memory stack, the first nanocrystalline diamond layer having a first thickness, a first roughness of greater than about 25 nm, a first hardness, an sp 3 content of greater than 80%, and a crystal size in a range of from 2 nm to 5 nm;
a second nanocrystalline diamond layer on the first nanocrystalline diamond layer, the second nanocrystalline diamond layer having a second thickness, an sp 3 content of greater than 80%, a crystal size in a range of from 2 nm to 5 nm, and a second roughness of less than about 15 nm; and
a memory channel extending from a top surface of the memory stack to the substrate.

2. The memory device of claim 1 , wherein the first thickness of the first nanocrystalline diamond layer is in a range of from about 250 nm to about 650 nm.

3. The memory device of claim 1 , wherein the second thickness of the second nanocrystalline diamond layer is in a range of from about 5 nm to about 200 nm.

4. The memory device of claim 1 , wherein the memory device is a vertically stacked NAND device.

5. The memory device of claim 1 , further comprising an anti-reflective coating on the second nanocrystalline diamond layer.

6. The memory device of claim 5 , further comprising a photoresist on the anti-reflective coating.

Assignees

• Applied Materials Inc
• Nat Univ Singapore

Inventors

• Sahmuganathan Vicknesh
• Gu Jiteng
• Venkatasubramanian Eswaranand
• Loh Kian Ping
• Mallick Abhijit Basu
• Sudijono John
• Chen Zhongxin

Classifications

• H10P50/285

  of materials not containing Si, e.g. PZT or Al2O3 · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P76/405 Primary

  characterised by their composition, e.g. multilayer masks · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title