Nanowires plated on nanoparticles

US11869864B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11869864-B2
Application numberUS-202217679087-A
CountryUS
Kind codeB2
Filing dateFeb 24, 2022
Priority dateApr 8, 2019
Publication dateJan 9, 2024
Grant dateJan 9, 2024

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In some examples, a system comprises a set of nanoparticles and a set of nanowires extending from the set of nanoparticles.

First claim

Opening claim text (preview).

What is claimed is: 1. A method, comprising: forming a set of nanoparticles; and forming a set of nanowires extending from the set of nanoparticles. 2. The method of claim 1 , wherein at least one nanowire of the set of nanowires has a length that is at least twice its diameter. 3. The method of claim 1 , wherein at least one nanowire of the set of nanowires has a diameter of no more than 1 micron. 4. The method of claim 1 , wherein at least one nanowire of the set of nanowires has a length of at least 2 microns. 5. The method of claim 1 , wherein the nanoparticles are formed on a metal layer. 6. The method of claim 1 , wherein the set of nanoparticles comprises titanium and wherein the set of nanowires comprises gold. 7. The method of claim 1 , further comprising: providing a first surface on which the set of nanoparticles is formed; providing a second surface on which a second set of nanoparticles is formed; forming a second set of nanowires extending from the second set of nanoparticles; and coupling together the set of nanowires and the second set of nanowires. 8. The method of claim 1 , further comprising providing a first surface on which the set of nanoparticles is disposed, wherein the set of nanowires couples to a second surface, and wherein the first and second surfaces are positioned within a package. 9. The method of claim 1 , wherein the set of nanowires forms a heat sink coupled to a semiconductor die. 10. The method of claim 1 , further comprising: positioning the set of nanoparticles on a first surface of a die; positioning a second set of nanoparticles on a busbar, extending a second set of nanowires from the second set of nanoparticles, the second set of nanowires fused to the set of nanowires; coupling a substrate to a first metal layer, the first metal layer coupled to the die by way of a third set of nanowires; and coupling a second metal layer to the substrate, the second metal layer coupled to a third metal layer by way of a fourth set of nanowires, wherein the third metal layer comprises a fifth set of nanowires positioned external to a package housing the die, the first metal layer, and the second metal layer. 11. The method of claim 10 , further comprising positioning a third set of nanoparticles on the die and a fourth set of nanoparticles positioned on the first metal layer, the third set of nanowires extending from the third set of nanoparticles and a sixth set of nanowires extending from the fourth set of nanoparticles, the third and sixth sets of nanowires fused to each other. 12. The method of claim 10 , wherein the fifth set of nanowires and the fourth set of nanowires are positioned on opposing surfaces of the second metal layer. 13. The method of claim 10 , wherein the substrate comprises a ceramic substrate. 14. A method, comprising: providing a first surface; coupling a first set of nanoparticles to the first surface; extending a first set of nanowires from the first set of nanoparticles; providing a second surface; coupling a second set of nanoparticles to the second surface; extending a second set of nanowires from the second set of nanoparticles; and fusing the first and second sets of nanowires fused to each other. 15. The method of claim 14 , wherein at least one of the first set of nanowires has length and diameter dimensions such that the at least one of the first set of nanowires has a melting point between 65 and 175 degrees Fahrenheit. 16. The method of claim 14 , wherein the first surface comprises a metal layer. 17. The method of claim 14 , wherein the first surface comprises a semiconductor. 18. The method of claim 14 , wherein at least one nanowire of the first set of nanowires has a length that is at least twice its diameter. 19. The method of claim 14 , wherein the first surface, the first set of nanoparticles, and the first set of nanowires are part of a semiconductor package, and wherein the second surface, the second set of nanoparticles, and the second set of nanowires are part of a printed circuit board (PCB). 20. The method of claim 14 , wherein the first surface is a surface of a semiconductor die and the second surface is a surface of a portion of a lead frame, and wherein the first and second surfaces are positioned within a semiconductor package. 21. The method of claim 20 , wherein the semiconductor die has a third surface opposite the first surface, a third set of nanoparticles positioned on the third surface, a third set of nanowires extending from the third set of nanoparticles, the third set of nanowires forming a heat sink exposed to an exterior of the semiconductor package. 22. The method of claim 14 , wherein the first surface is that of a die, and the second surface is that of a busbar, the method further comprising: coupling a metal layer to the die by way of a third set of nanowires, the metal layer having a fourth set of nanowires positioned external to a semiconductor package housing the die. 23. The method of claim 22 , further comprising coupling a third set of nanoparticles to the die and coupling a fourth set of nanoparticles to the metal layer, the third set of nanowires coupling the third set of nanoparticles to the fourth set of nanoparticles. 24. The method of claim 23 , further comprising coupling a fifth set of nanowires to the die, wherein the third set of nanowires couples to the metal layer, the third and fifth sets of nanowires fused to each other. 25. An apparatus, comprising: a set of nanoparticles on a surface of a semiconductor device; and a set of nanowires extending from the set of nanoparticles. 26. The apparatus of claim 25 , wherein the surface comprises a metal layer. 27. The apparatus of claim 26 , wherein the metal layer and the set of nanoparticles are composed of a same metal. 28. The apparatus of claim 26 , wherein the metal layer and the set of nanoparticles are composed of different metals.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title

  • by plating, e.g. electroless plating or electroplating · CPC title

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Frequently asked questions

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What does patent US11869864B2 cover?
In some examples, a system comprises a set of nanoparticles and a set of nanowires extending from the set of nanoparticles.
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification H10W40/228. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 09 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).