Method of manufacturing an electromagnetic interference shielding layer

US11848276B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11848276-B2
Application numberUS-201917287326-A
CountryUS
Kind codeB2
Filing dateNov 4, 2019
Priority dateNov 5, 2018
Publication dateDec 19, 2023
Grant dateDec 19, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing a semiconductor package which is at least in part covered by an electromagnetic interference shielding layer. The method includes at least these steps: i. providing the semiconductor package and an ink composition having at least a compound comprising at least one metal precursor and at least one organic compound; ii. applying at least a part of the ink composition onto the semiconductor package, wherein a precursor layer is formed; and iii. treating the precursor layer with an irradiation of a peak wavelength in the range from 100 nm to 1 mm. Further disclosed is a semiconductor package comprising an electromagnetic interference shielding layer comprising at least one metal, wherein the semiconductor package is obtainable by the aforementioned method. Still further disclosed are a semiconductor package comprising an electromagnetic interference shielding layer having a specific conductance and thickness, and uses of an ink composition.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of manufacturing a semiconductor package, which is at least in part covered by an electromagnetic interference shielding layer, comprising at least these steps: i. providing the semiconductor package and an ink composition, wherein the ink composition comprises at least these constituents: a) a compound comprising at least one metal precursor, and b) at least one organic compound; ii. applying at least a part of the ink composition onto the semiconductor package, wherein a precursor layer is formed; and iii. treating the precursor layer with an irradiation, wherein at least 80% of the irradiation has a wavelength in the range from 100 nm to 1 mm, based on the total irradiation applied during the treating. 2. The method of claim 1 , wherein the application of the ink composition in step ii. is performed by using inkjet technology. 3. The method of claim 1 , wherein the treating is performed by infrared irradiation having a peak wavelength in the range from 1,500 nm to 4,000 nm. 4. The method of claim 1 , wherein the precursor layer is treated with the irradiation for less than 10 minutes. 5. The method of claim 1 , wherein the total radiative flux density of the irradiation is in the range of from 100 to 1,000,000 W/cm 2 . 6. The method of claim 1 , wherein the at least one organic compound is a terpene. 7. The method of claim 1 , wherein the semiconductor package comprises one or more electrical components, of which at least one is a semiconductor element, wherein the electrical components are at least in part molded with a mold. 8. The method of claim 1 , wherein the electromagnetic interference shielding layer has a thickness of 5 μm at most. 9. The method of claim 1 , wherein the at least one metal precursor has a decomposition temperature in the range from 80 to 500° C. 10. The method of claim 1 , wherein the at least one metal precursor has at least one of these features: at least one metal cation which is selected from the group consisting of silver, copper and gold, or a combination of any two of them, or all three; at least one anion which is selected from the group consisting of carboxylate, carbamate, formate and nitrate; or a combination of any two or more of the at least one metal cation and the at least one anion. 11. The method of claim 1 , wherein the amount of metal in the ink composition is in the range from 1 to 60 wt. %, based on the total weight of the composition. 12. The method of claim 1 , wherein an amount of metal particles in the ink composition is less than 1 wt. %, based on the total weight of the ink composition. 13. A semiconductor package comprising an electromagnetic interference shielding layer comprising at least one metal obtained by the method according to claim 1 , wherein the electromagnetic interference shielding layer adjoins the semiconductor package and has at least one of these features: a thickness in the range from 5 nm to 5 μm; a variation of the thickness of less than 50%; an electrical conductance of at least 5% with respect to the conductance of the bulk metal; and a printing resolution in the range from 30 to 150 μm; or a combination of at least two of the features. 14. A semiconductor package comprising at least one electronic component, a mold and a first layer of an electromagnetic interference shielding material, wherein: the mold surrounds at least a part of the at least one electronic component; the first layer of the electromagnetic interference shielding material adjoins at least a part of the mold; the first layer of the electromagnetic interference shielding material is in direct physical contact with the mold; the specific conductance of the first layer of the electromagnetic interference shielding material is in the range from 5 to 90% of the bulk metal; and the thickness of the first layer of the electromagnetic interference shielding material is in the range from 5 nm to 5 μm. 15. The semiconductor package of claim 14 , wherein the first layer is a single layer of electromagnetic interference shielding material. 16. The semiconductor package of claim 14 , wherein the electromagnetic interference shielding material comprises a metal selected from the group consisting of silver, gold and copper or a combination of at least two thereof. 17. An article comprising at least two semiconductor packages according to claim 14 , wherein at least two of the semiconductor packages are stacked. 18. A use of an ink composition comprising at least one metal precursor and at least one organic compound for creating an improved conductive layer on a semiconductor package, wherein: the conductive layer forms an electromagnetic interference shield which layer adjoins to the surface of the semiconductor package; the ink composition is applied to the semiconductor package using inkjet technology; and the conductive layer is formed by treating the ink composition with irradiation of a peak wavelength in the range from 100 nm to 1 mm. 19. The use of an ink composition according to claim 18 , wherein the improvement consists of at least one of these features: A] a thinner yet effective electromagnetic interference shielding layer; B] the electromagnetic interference shielding layer is less susceptible to mechanical stress or impact; and C] a better adhesion of the electromagnetic interference shielding layer to the semiconductor package. 20. An article comprising at least two semiconductor packages obtained by a method according to claim 1 wherein at least two of the semiconductor packages are stacked.

Assignees

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Classifications

  • the substrate having spherical bumps for external connection · CPC title

  • Manufacture or treatment · CPC title

  • the arrangements being between laterally adjacent chips, e.g. walls between chips · CPC title

  • the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

  • characterised by their shape or disposition · CPC title

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What does patent US11848276B2 cover?
A method of manufacturing a semiconductor package which is at least in part covered by an electromagnetic interference shielding layer. The method includes at least these steps: i. providing the semiconductor package and an ink composition having at least a compound comprising at least one metal precursor and at least one organic compound; ii. applying at least a part of the ink composition ont…
Who is the assignee on this patent?
Heraeus Deutschland Gmbh & Co Kg, Heraeus Electronics Gmbh & Co Kg
What technology area does this patent fall under?
Primary CPC classification H10W42/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 19 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).