Storage device and operating method of storage device

Patent metadata

Field	Value
Publication number	US-11829626-B2
Application number	US-202117360099-A
Country	US
Kind code	B2
Filing date	Jun 28, 2021
Priority date	Nov 2, 2020
Publication date	Nov 28, 2023
Grant date	Nov 28, 2023

Abstract

A storage device includes a nonvolatile memory device and a controller that accesses the nonvolatile memory device based on a request of an external host device, receives a first clock signal from the external host device, generates a second clock signal through frequency multiplication of the first clock signal, and communicates with the external host device based on the second clock signal. The controller requests the external host device to adjust a multiplication ratio for the frequency multiplication of the first clock signal.

First claim

What is claimed is:

1. A storage device comprising:
a nonvolatile memory device; and
a controller configured to:
access the nonvolatile memory device based on a request from an external host device,
receive a first clock signal from the external host device,
generate a second clock signal through frequency multiplication of the first clock signal, and
communicate with the external host device based on the second clock signal,

wherein the controller is further configured to request the external host device to adjust a multiplication ratio for the frequency multiplication of the first clock signal.

2. The storage device of claim 1 , wherein the controller is further configured to request the external host device to decrease the multiplication ratio in response to detecting a decrease in a speed at which the nonvolatile memory device is accessed.

3. The storage device of claim 1 , wherein the controller is further configured to request the external host device to decrease the multiplication ratio in response to detecting a decrease in a write speed into the nonvolatile memory device.

4. The storage device of claim 1 , wherein the nonvolatile memory device comprises a first area and a second area, and
wherein the controller is further configured to request the external host device to decrease the multiplication ratio in response to a free capacity of the first area being smaller than or equal to a first threshold value.

5. The storage device of claim 4 , wherein the controller is further configured to:
allow data of the first area of the nonvolatile memory device to migrate to the second area, and
request the external host device to restore the multiplication ratio in response to the free capacity of the first area being greater than or equal to a second threshold value.

6. The storage device of claim 1 , further comprising:
a temperature sensor configured to output temperature information,
wherein the controller is further configured to:
receive the temperature information from the temperature sensor; and
limit an operating speed of the storage device in response to a temperature indicated by the temperature information being greater than or equal to a first threshold value, and

wherein the controller is further configured to request the external host device to decrease the multiplication ratio in response to the temperature being greater than or equal to the first threshold value.

7. The storage device of claim 6 , wherein the storage device is further configured to restore the operating speed of the storage device in response to the temperature being smaller than or equal to a second threshold value, and
wherein the controller is further configured to request the external host device to restore the multiplication ratio in response to the temperature being smaller than or equal to the second threshold value.

8. The storage device of claim 1 , wherein the controller is further configured to request, by writing information of the multiplication ratio into a link control register, the external host device to adjust the multiplication ratio.

9. The storage device of claim 1 , wherein the controller is further configured to request, by writing retrain information into a control register, a retrain operation for adjustment of the multiplication ratio by the external host device.

10. The storage device of claim 1 , wherein the controller is further configured to request the external host device to adjust the multiplication ratio, by transmitting an interrupt to the external host device or by responding to a poll sent by the external host device.

11. The storage device of claim 1 , wherein the controller is further configured to communicate with the external host device based on a peripheral component interconnect express (PCIe) protocol.

12. The storage device of claim 11 , wherein the multiplication ratio is selected from a group of multiplication ratios including 25 times, 50 times, 80 times, 160 times, and 320 times.

13. A storage device comprising:
a nonvolatile memory device; and
a controller configured to:
establish a link with an external host device based on two or more lanes, and
access the nonvolatile memory device based on a request of the external host device transferred through the link,

wherein the controller is further configured to request the external host device to disable at least one lane of two or more lanes included in the link.

14. The storage device of claim 13 , wherein the nonvolatile memory device comprises a first area and a second area, and
wherein the controller is further configured to request the external host device to disable the at least one lane in response to a free capacity of the first area being smaller than or equal to a first threshold value.

15. The storage device of claim 13 , further comprising a temperature sensor configured to output temperature information,
wherein the controller is further configured to:
receive the temperature information from the temperature sensor; and
limit an operating speed of the storage device in response to a temperature indicated by the temperature information being greater than or equal to a threshold value, and

wherein the controller is further configured to request that the external host device disable the at least one lane in response to the temperature being greater than or equal to the threshold value.

16. The storage device of claim 13 , wherein the controller is further configured to communicate with the external host device based on a peripheral component interconnect express (PCIe) protocol, and
wherein the controller is further configured to establish the link based on a number of lanes, the number of lanes being 2, 4, 8, or 16 lanes.

17. An operating method of a storage device which includes a nonvolatile memory device and a controller, the operating method comprising:
establishing a link between the controller and an external host device, the link having a first link speed and a first link width;
accessing, by the controller, the nonvolatile memory device in response to a request received from the external host device via the link;
requesting, by the controller, the external host device to adjust a transmission rate defined by the first link speed and the first link width in response to detecting an operating speed decrease; and
performing, by the controller, a retrain operation with the external host device.

18. The operating method of claim 17 , wherein the nonvolatile memory device comprises a first area and a second area,
the operating method further comprising:
detecting that the operating speed decreases, in response to a free capacity of the first area of the nonvolatile memory device being smaller than or equal to a threshold value.

19. The operating method of claim 17 , wherein the storage device further includes a temperature sensor configured to output temperature information,
the operating method further comprising:
limiting, at the controller, the operating speed of the storage device in response to a temperature indicated by the temperature information being greater than or equal to a threshold value; and
detecting that the operating speed decreases, in response to the temperature being greater than or equal to the threshold value.

20. The operating method of claim 17 , wherein the storage device further comprises a buffer memory,
the operating method further comprising:
detecting that the operating speed decreases, in response to a free capacity of the buffer me

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lim Jaehwan
• Kim Sung-Wook
• Kim Jae Eun
• You Daehun
• Jun Walter

Classifications

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F3/0647 Primary

  Migration mechanisms · CPC title

• G06F1/324

  by lowering clock frequency · CPC title

• G06F3/0613

  in relation to throughput · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title