Method and apparatus to control a link power state

Patent metadata

Field	Value
Publication number	US-9880601-B2
Application number	US-201414582741-A
Country	US
Kind code	B2
Filing date	Dec 24, 2014
Priority date	Dec 24, 2014
Publication date	Jan 30, 2018
Grant date	Jan 30, 2018

Abstract

A method is provided for controlling a link. This may include determining a condition of a first device coupled to the link, receiving, at the first device, a request for a specific link state from a second device coupled to the link, and determining a power state of the link based on the determined condition of the first device.

First claim

What is claimed is:

1. A method of controlling a link comprising:
determining a condition of at least one component of a first device coupled to the link, wherein determining the condition includes at least one of determining an idle condition of the at least one component and determining a non-idle condition of the at least one component;
receiving, at the first device, a request for a specific link state from a second device coupled to the link;
in response to receiving the request for the specific link state, determining a power off state of the link based only on the determined idle condition of the at least one component; and
in response to receiving the request for the specific link state, determining a power on state of the link based on the determined non-idle condition of the at least one component.

2. The method of claim 1 , wherein determining the non-idle condition includes determining an active condition of the at least one component of the first device.

3. The method of claim 2 , wherein the power on state of the link is determined based on the determined active condition of the at least one component of the first device.

4. The method of claim 2 , wherein determining the power on state includes changing a state of the link to the power on state based on the determined active condition of the at least one component of the first device.

5. The method of claim 1 , wherein the link is a Peripheral Component Interconnect Express (PCIe) link.

6. The method of claim 1 , wherein the first device is a processor.

7. The method of claim 1 , wherein the at least one component of the first device is a core of a processor.

8. An electronic apparatus comprising:
first logic, at least a portion of which is hardware, to determine a condition of at least one component of a first device, wherein the first logic to determine the condition includes at least one of the first logic to determine an idle condition of the at least one component and the first logic to determine a non-idle condition of the at least one component; and
second logic, at least a portion of which is hardware, to determine a power off state of a link in response to a request for a specific link state, wherein the power off state of the link is to be determined based only on the determined idle condition of the at least one component and the second logic to determine a power on state of the link in response to a request for a specific link state, wherein the power on state of the link is determined based on the determined non-idle condition of the at least one component.

9. The electronic apparatus of claim 8 , wherein the first logic to determine the non-idle condition includes the first logic to determine an active condition of the at least one component of the first device.

10. The electronic apparatus of claim 9 , wherein the power on state of the link is determined based on the determined active condition of the at least one component of the first device.

11. The electronic apparatus of claim 8 , wherein the link is a Peripheral Component Interconnect Express (PCIe) link.

12. A non-transitory machine-readable medium comprising one or more instructions that when executed cause a processor to perform one or more operations to:
determine a condition of at least one component of a first device coupled to a link, wherein to determine the condition includes at least one of to determine an idle condition of the at least one component and to determine a non-idle condition of the at least one component;
in response to receiving a request for a specific link state, determine a power off state of the link based only on the determined idle condition of the at least one component; and
in response to receiving a request for a specific link state, determine a power on state of the link is based on the determined non-idle condition of the at least one component.

13. The non-transitory machine-readable medium of claim 12 , wherein to determine the non-idle condition includes to determine an active condition of the at least one component of the first device.

14. The non-transitory machine-readable medium of claim 13 , wherein to determine a power on state of the link is based on the determined active condition of the at least one component of the first device.

15. The non-transitory machine-readable medium of claim 12 , wherein the link is a Peripheral Component Interconnect Express (PCIe) link.

Assignees

• Intel Corp

Inventors

• Gough Corey D
• Steiner Ian M
• Sistla Krishnakanth V

Classifications

• G06F13/4282 Primary

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F1/28 Primary

  Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

• G06F1/3253

  Power saving in bus · CPC title

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title

• G06F1/3296

  by lowering the supply or operating voltage · CPC title