Temperature control loop for integrated circuit

Patent metadata

Field	Value
Publication number	US-11822399-B2
Application number	US-202117387376-A
Country	US
Kind code	B2
Filing date	Jul 28, 2021
Priority date	Jul 28, 2021
Publication date	Nov 21, 2023
Grant date	Nov 21, 2023

Abstract

A temperature control apparatus is disclosed. An integrated circuit (IC) includes a plurality of temperature sensors, a first thermal control loop, and a second thermal control loop. The first thermal control loop is configured to control temperature of the IC by reducing a frequency of a clock signal provided to the IC in response to a temperature at one of the plurality of temperature sensors reaching a first temperature threshold. The second thermal control loop is configured to control temperature of the IC by dithering the clock signal provided to the IC in response to a temperature at one of the plurality of temperature sensors reaching a second temperature threshold that is greater than the first temperature threshold.

First claim

What is claimed is:

1. An apparatus, comprising:
an integrated circuit (IC) that includes a plurality of temperature sensors;
a first thermal control loop configured to control temperature of the IC by reducing a frequency of a clock signal provided to the IC in response to a temperature at one of the plurality of temperature sensors reaching a first temperature threshold, wherein the first temperature threshold includes a temperature value and a guardband, wherein the guardband is determined based on a temperature detected at a particular one of the plurality of temperature sensors and a temperature at a designated hotspot on the integrated circuit during operation in a designated normal workload condition; and
a second thermal control loop configured to control temperature of the IC by dithering the frequency of the clock signal provided to the IC in response to a temperature at one of the plurality of temperature sensors reaching a second temperature threshold that is greater than the first temperature threshold.

2. The apparatus of claim 1 , wherein the second thermal control loop is configured to dither the clock signal in response to receiving an indication from the first thermal control loop that the one of the plurality of temperature sensors has reached the second temperature threshold.

3. The apparatus of claim 1 , wherein the particular one of the plurality of temperature sensors is physically closer to the designated hotspot than other ones of the plurality of temperature sensors.

4. The apparatus of claim 1 , wherein the designated normal workload condition is a maximum expected normal workload.

5. The apparatus of claim 1 , wherein the first thermal control loop is configured to initiate a reset of the IC in response to receiving an indication that a temperature at one of the plurality of temperature sensors has reached a third temperature threshold that is greater than the second temperature threshold.

6. The apparatus of claim 5 , wherein the first thermal control loop is configured to initiate a reduction of an operating voltage in the IC in response to receiving an indication that a temperature at one of the plurality of temperature sensors has reached a fourth temperature value that is greater than the second temperature threshold and less than the third temperature threshold.

7. The apparatus of claim 1 , wherein the second thermal control loop is further configured to gate the clock signal for an amount of time in response to detecting a droop in a supply voltage provided to the IC.

8. A method comprising:
providing temperature readings from ones of a plurality of temperature sensors implemented on an integrated circuit (IC) to a first thermal control loop;
reducing, using the first thermal control loop, a frequency of a clock signal provided to the IC in response to one of the plurality of temperature sensors detecting a temperature reaching a first temperature threshold, wherein the first temperature threshold comprises a temperature value and a guardband, and wherein the method further comprises determining the guardband based on a temperature detected at a particular one of the plurality of temperature sensors and a temperature at a designated hotspot on the integrated circuit during operation in a maximum expected workload condition; and
dithering the frequency a clock signal, using a second thermal control loop, in response to a temperature at one of the temperature sensors reaching a second temperature threshold that is greater than the first temperature threshold.

9. The method of claim 8 , wherein the particular one of the plurality of temperature sensors is physically closer to the designated hotspot than other ones of the plurality of temperature sensors.

10. The method of claim 9 , further comprising:
comparing temperature readings received from ones of the plurality of sensors to ones of a plurality of thresholds, the plurality of thresholds including the first and second thresholds, and wherein ones of the plurality of thresholds include a specified temperature value and a corresponding offset based on the guardband;
generating a proportional error signal based on the comparing;
generating an integral error signal based on the comparing; and
generating a control output signal based on summing the proportional and integral error signals.

11. The method of claim 8 , further comprising the second thermal control loop gating the clock signal for an amount of time in response to detecting a droop in a supply voltage distributed on the IC.

12. The method of claim 8 , further comprising the first thermal control loop initiating a reset of the IC in response to receiving an indication that a temperature at one of the plurality of temperature sensors has reached a third temperature threshold that is greater than the second temperature threshold.

13. The method of claim 12 , further comprising the first thermal control loop initiating a reduction of an operating voltage in the IC in response to receiving an indication that a temperature at one of the plurality of temperature sensors has reached a fourth temperature value that is greater than the second temperature threshold and less than the third temperature threshold.

14. A system comprising:
a plurality of temperature sensors implemented on an integrated circuit (IC);
a first control loop configured to receive temperature readings from ones of the plurality of temperature sensors, and further configured to:
compare the temperature readings received from ones of the plurality of temperature sensors to a plurality of temperature thresholds including a first temperature threshold, wherein the first temperature threshold includes a temperature value and a guardband determined based on a temperature detected at a particular one of the plurality of temperature sensors and a temperature at a designated hotspot on the integrated circuit during operation in a designated normal workload condition;
reduce a frequency of a clock signal provided by the integrated circuit in response to one of the plurality of temperature sensors indicating a temperature that has reached the first temperature threshold;

a second control loop configured to monitor a supply voltage distributed on the integrated circuit and further configured to:
dither the frequency of the clock signal in response to receiving an indication from the first control loop of a temperature reading reaching a second temperature threshold greater than the first temperature threshold;
gate the clock signal for an amount of time in response to detecting that the supply voltage has fallen below a voltage threshold value.

15. The system of claim 14 , wherein the designated normal workload condition comprises a maximum expected workload.

16. The system of claim 14 , wherein the first control loop is further configured to cause a reset of the IC in response to receiving a temperature reading indicative of a temperature that is at least a third temperature threshold, wherein the third temperature threshold is greater than the second temperature threshold.

17. The system of claim 16 , wherein the first control loop is configured to initiate a reduction in the supply voltage in response receiving a temperature reading that is at least a fourth temperature threshold, wherein the fourth temperature threshold is greater than the second temperature threshold and less than the third temperature threshold.

18. The system of claim 14 , wherein the system includes a power management processor, wherein the power management processor comprises

Assignees

• Apple Inc

Inventors

• Rajwan Doron
• Kuzi Tal
• Cox Keith
• Yang Yizhang

Classifications

• G06F1/206 Primary

  comprising thermal management · CPC title

• G06F1/08

  Clock generators with changeable or programmable clock frequency · CPC title

• G06F11/3058 Primary

  Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations (thermal management in cooling arrangements of a computing system G06F1/206) · CPC title

• G06F2201/81

  Threshold · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title