Display substrate and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-11817307-B2
Application number	US-201916766735-A
Country	US
Kind code	B2
Filing date	Jul 24, 2019
Priority date	Jul 24, 2019
Publication date	Nov 14, 2023
Grant date	Nov 14, 2023

Abstract

The present disclosure relates to a display substrate and a method for manufacturing the same. The display substrate includes: a substrate; a first electrode located on the substrate; and a conductive convex located on the first electrode. A dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode.

First claim

What is claimed is:

1. A display substrate, comprising:
a substrate;
a first electrode located on the substrate; and
a conductive convex located on the first electrode,
wherein a dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode, and
wherein a ratio of a minimum dimension of a surface of a side of the conductive convex facing the substrate along a direction parallel to the substrate to a distance from the conductive convex to the first electrode ranges from 1:1 to 1:3, and
wherein the conductive convex comprises a first portion, a second portion covering the first portion, and an inorganic material layer covering the first portion, the inorganic material layer being located between the first portion and the second portion, and
wherein an orthographic projection of the first portion on the substrate is located within an orthographic projection of the first electrode on the substrate,
the second portion is in contact with the first electrode,
a surface of the second portion away from the substrate is conformal to a surface of the first portion away from the substrate, and
the first portion is composed of a dielectric material, the dielectric material comprises an organic material, and the second portion is composed of a conductive material.

2. The display substrate according to claim 1 , wherein a shape of the conductive convex is at least one selected from a group consisting of a cone, a truncated cone, and a prism.

3. The display substrate according to claim 1 , wherein the second portion further covers a surface of the first electrode adjacent to the first portion.

4. The display substrate according to claim 1 , wherein the conductive convex is composed of a conductive material.

5. The display substrate according to claim 4 , wherein the first electrode is formed integrally with the conductive convex,
wherein a ratio of a thickness of the first electrode to a distance from a top of the conductive convex to a bottom of the first electrode ranges from 1:4 to 1:2.

6. The display substrate according to claim 1 , wherein a plurality of conductive convexes arranged in an array are disposed on each of the first electrodes.

7. The display substrate according to claim 6 , wherein the conductive convex comprises a triangular prism,
the triangular prism comprises a first surface parallel to the surface of the substrate, the first surface comprises a first side and a second side intersecting the first side,
a dimension of the first side is 2-10 μm,
a dimension of the second side is 1-5 μm,
a height of the triangular prism along a direction perpendicular to the substrate is 1-5 μm,
a distance between two adjacent conductive convexes in a direction of the first side is 2-10 μm, and
a distance between two adjacent conductive convexes in a direction of the second side is 2-5 μm.

8. The display substrate according to claim 1 , further comprising: an electronic device located on the conductive convex, wherein a pin of the electronic device is in contact with the conductive convex; and
an adhesive located between the conductive convexes, the pin is joined to the first electrode by the adhesive.

9. The display substrate according to claim 8 , further comprising:
a thin film transistor located on the substrate; and
a first dielectric layer located on the thin film transistor,
wherein the first electrode is located on the first dielectric layer and is electrically connected to the thin film transistor.

10. A method for manufacturing a display substrate, comprising:
provide a substrate;
forming a first electrode on the substrate; and
forming a conductive convex on the first electrode,
wherein a dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode, and
wherein a ratio of a minimum dimension of a surface of a side of the conductive convex facing the substrate along a direction parallel to the substrate to a distance from the conductive convex to the first electrode ranges from 1:1 to 1:3,
wherein forming the conductive convex comprises:
forming a dielectric material layer on the first electrode;
patterning the dielectric material layer to form a first portion of the conductive convex;
forming a first conductive material layer on the substrate, the first electrode, and the first portion; and
patterning the first conductive material layer to form a second portion of the conductive convex,
wherein an orthographic projection of the first portion on the first electrode is located within an orthographic projection of the second portion on the first electrode,
the second portion covers the first electrode and is in contact with the first electrode, and
a surface of the second portion away from the substrate is conformal to a surface of the first portion away from the substrate,

wherein forming the conductive convex further comprises: forming an inorganic material layer on the first portion after forming the first portion and before forming the first conductive material layer, wherein a surface of the inorganic material layer away from the substrate is conformal to a surface of the first portion away from the substrate are conformal.

11. The method according to claim 10 , wherein before forming the first conductive material layer on the first portion, further comprising roughening a surface of the first portion.

12. The method according to claim 10 , wherein the dielectric material layer comprises a photosensitive material,
patterning the dielectric material layer comprises exposing the dielectric material layer using a first mask and developing the dielectric material layer,
wherein a radiation dose of a light used for the exposure, a dimension of a light shielding portion of the first mask along a direction perpendicular to a direction in which the light shielding portion extends, and a distance between the first mask and the dielectric material layer are configured such that a diffracted light is generated at an edge of the light shielding portion during the exposure, wherein at least a portion of the diffracted light can reach a surface of the dielectric material layer located below a central portion of the light shielding portion.

13. The method according to claim 10 , wherein forming the first electrode on the substrate and forming the conductive convex on the first electrode comprise:
forming a second conductive material layer on the substrate; and
patterning the second conductive material layer to form the first electrode and the conductive convex located on the first electrode.

14. The method according to claim 10 , further comprising:
forming an adhesive layer to cover the conductive convex and a portion of the first electrode located between the conductive convexes;
placing an electronic device on the adhesive layer and applying a force to the electronic device so that the conductive convex penetrates the adhesive layer and contacts the electronic device; and
curing the adhesive layer.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Yuan Guangcai
• Lv Zhijun
• Li Haixu
• Song Xiaoxin
• Zhang Feng
• Liu Wenqu
• Dong Liwen
• Cui Zhao
• Wang Libo
• Meng Detian

Classifications

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W72/072

  of bump connectors · CPC title

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/856

  Bump connectors and die-attach connectors (bumps embedded in underfills H10W74/15) · CPC title