Redistribution layer connection

Patent metadata

Field	Value
Publication number	US-11784151-B2
Application number	US-202016936263-A
Country	US
Kind code	B2
Filing date	Jul 22, 2020
Priority date	Jul 22, 2020
Publication date	Oct 10, 2023
Grant date	Oct 10, 2023

Abstract

Examples herein include die to metallization structure connections that eliminate the solder joint to reduce the resistance and noise on the connection. In one example, a first die is attached to a metallization layer by a plurality of copper interconnections and a second is attached to the metallization layer opposite the first die through another plurality of copper interconnections. In this example, the copper interconnects may connect the respective die to a metallization structure in the metallization layer.

First claim

What is claimed is:

1. A package comprising:
a metallization layer;
a first die electrically coupled to a first side of the metallization layer;
a second die electrically coupled to a second side of the metallization layer opposite the first side of the metallization layer, the second die being encapsulated by a mold compound on the second side of the metallization layer;
a first plurality of copper interconnections between the first die and the metallization layer; and
a second plurality of copper interconnections between the second die and the metallization layer, wherein one of the second plurality of copper interconnections is comprised of:
a first copper portion and a second copper portion directly coupled together;
the first copper portion coupled to the first side of the metallization layer and the second copper portion coupled to the second die;

wherein electrical paths configured to couple the first plurality of copper interconnections with the second plurality of copper interconnections are solderless, and
wherein the metallization layer is wider than the first die and wider than the second die.

2. The package of claim 1 , further comprising a first metallization structure in the metallization layer wherein the first plurality of copper interconnections are connected to the first metallization structure.

3. The package of claim 2 , further comprising a second metallization structure in the metallization layer wherein the second plurality of copper interconnections are connected to the second metallization structure.

4. The package of claim 3 , wherein the first metallization structure is coupled to the second metallization structure.

5. The package of claim 3 , wherein the first metallization structure is one of copper, silver, gold, or similar metals.

6. The package of claim 5 , wherein the second metallization structure is one of copper, silver, gold, or similar metals.

7. The package of claim 1 , wherein the first plurality of copper interconnections comprises at least one copper die bump and at least one copper pillar.

8. The package of claim 7 , wherein the second plurality of copper interconnections comprises a pillar formed with a copper to copper diffusion bond.

9. The package of claim 7 , further comprising a dielectric layer between the second die and the metallization layer.

10. The package of claim 9 , wherein the dielectric layer comprises an oxide covalent bond.

11. The package of claim 1 , wherein the package is incorporated into a device selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, and a device in an automotive vehicle.

12. A package comprising:
a metallization layer;
a first die electrically coupled to a first side of the metallization layer;
a second die electrically coupled to a second side of the metallization layer opposite the first side of the metallization layer, the second die being encapsulated by a mold compound on the second side of the metallization layer;
first means for interconnection between the first die and the metallization layer; and
second means for interconnection between the second die and the metallization layer, wherein one of the second means for interconnection is comprised of:
a first copper portion and a second copper portion directly coupled together;

the first copper portion coupled to the first side of the metallization layer and the second copper portion coupled to the second die;
wherein electrical paths configured to couple the first means with the second means are solderless, and
wherein the metallization layer is wider than the first die and wider than the second die.

13. The package of claim 12 , further comprising a first metallization structure in the metallization layer wherein the first means for interconnection are connected to the first metallization structure.

14. The package of claim 13 , further comprising a second metallization structure in the metallization layer wherein the second means for interconnection are connected to the second metallization structure.

15. The package of claim 14 , wherein the first metallization structure is coupled to the second metallization structure.

16. The package of claim 14 , wherein the first metallization structure is one of copper, silver, gold, or similar metals.

17. The package of claim 16 , wherein the second metallization structure is one of copper, silver, gold, or similar metals.

18. The package of claim 12 , wherein the first means for interconnection comprises at least one copper die bump and at least one copper pillar.

19. The package of claim 18 , wherein the second plurality of copper interconnections comprises a pillar formed with a copper to copper diffusion bond.

20. The package of claim 18 , further comprising a dielectric layer between the second die and the metallization layer.

21. The package of claim 20 , wherein the dielectric layer comprises an oxide covalent bond.

22. The package of claim 12 , wherein the package is incorporated into a device selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, and a device in an automotive vehicle.

23. A method for manufacturing a package, the method comprising:
forming a metallization layer;
forming a first plurality of copper interconnections on a first side of the metallization layer;
forming a second plurality of copper interconnections on a second side of the metallization layer opposite the first side of the metallization layer;
electrically coupling a first die to the first plurality of copper interconnections; and
electrically coupling a second die to the second plurality of copper interconnections, the second die being encapsulated by a mold compound on the second side of the metallization layer,
wherein electrical paths configured to couple the first plurality of copper interconnections with the second plurality of copper interconnections are solderless, and
wherein the metallization layer is wider than the first die and wider than the second die;
wherein one of the second plurality of copper interconnections is comprised of:
a first copper portion and a second copper portion directly coupled together;
the first copper portion coupled to the first side of the metallization layer and the second copper portion coupled to the second die.

24. The method of claim 23 , further comprising forming a first metallization structure in the metallization layer wherein the first plurality of copper interconnections are connected to the first metallization structure.

25. The method of claim 23 , further comprising forming a second metallization structure in the metallization layer wherein the second plurality of copper interconnections are connected to the second metallization structure.

26. The method of claim 23 , wherein the first plurality of copper interconnections comprises at least one copper die bump and at least one copper pillar.

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Assignees

• Qualcomm Inc

Inventors

• Patil Aniket
• We Hong Bok
• Hsu Marcus

Classifications

• H10W90/722

  between stacked chips · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W72/874

  On different surfaces · CPC title

• H10W72/9413

  on encapsulations · CPC title