Use of buffer members during growth of single crystal silicon ingots

US11767610B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11767610-B2
Application numberUS-202117553031-A
CountryUS
Kind codeB2
Filing dateDec 16, 2021
Priority dateDec 31, 2020
Publication dateSep 26, 2023
Grant dateSep 26, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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Abstract

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Methods for producing single crystal silicon ingots by Continuous Czochralski (CCz) are disclosed. A batch of buffer members (e.g., quartz cullets) is added to an outer melt zone of the crucible assembly before the main body of the ingot is grown. In some embodiments, the ratio of the mass M of the batch of buffer members added to the melt to the time between adding the batch of buffer members to the melt and when the ingot main body begins to grow is controlled such that the ratio of M/T is greater than a threshold M/T.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for growing a single crystal silicon ingot in a continuous Czochralski process, the method comprising: forming a melt of silicon in a crucible assembly; adding a batch of quartz cullets to the melt, the batch having a mass M; contacting a surface of the melt with a seed crystal; withdrawing the single crystal silicon ingot from the melt, the single crystal silicon ingot comprising a main body, there being a time T between adding the batch of quartz cullets to the melt and start of growth of the main body; controlling the ratio of M/T to be greater than a threshold M/T to reduce void counts in wafers sliced from the single crystal silicon ingot; and adding solid polycrystalline silicon feedstock to the crucible assembly while withdrawing the single crystal silicon ingot to replenish the melt. 2. The method as set forth in claim 1 further comprising slicing a plurality of wafers from the single crystal silicon ingot, wherein the ratio of M/T is controlled to be greater than the threshold M/T such that the wafers sliced from the single crystal silicon ingot have a void count of less than 30 voids of a size of 0.2 μm or more. 3. The method as set forth in claim 1 further comprising slicing a plurality of wafers from the single crystal silicon ingot, wherein the ratio of M/T is controlled to be greater than the threshold M/T such that the wafers sliced from the single crystal silicon ingot have a void count of less than 20 voids of a size of 0.2 μm or more. 4. The method as set forth in claim 1 comprising determining the threshold M/T by: growing a plurality of single crystal silicon ingots with at least two of the ingots being grown with different ratios of M/T; measuring a void count in one or more wafers sliced from the plurality of single crystal silicon ingots; and determining the ratio of M/T for single crystal silicon ingots from which wafers were sliced having a void count below a threshold void count. 5. The method as set forth in claim 4 wherein the threshold void count is 30 voids of a size of 0.2 μm or more. 6. The method as set forth in claim 1 wherein the threshold M/T is 40 grams per hour. 7. The method as set forth in claim 1 wherein the threshold M/T is 60 grams per hour. 8. The method as set forth in claim 1 wherein the batch of quartz cullets is a first batch and the single crystal silicon ingot is a first crystal silicon ingot, the method comprising: terminating growth of the first single crystal silicon ingot; adding a second batch of quartz cullets to the melt, the second batch having a mass M 2 ; contacting a surface of the melt with a seed crystal; and withdrawing a second single crystal silicon ingot from the melt, the second single crystal silicon ingot comprising a main body, there being a time T 2 between adding the second batch of quartz cullets to the melt and start of growth of the main body, wherein the ratio of M 2 /T 2 is controlled to be greater than the threshold M/T to reduce void counts in wafers sliced from the second single crystal silicon ingot. 9. The method as set forth in claim 1 wherein the crucible assembly comprises a weir and a sidewall that define an outer melt zone between the weir and the sidewall, the batch of quartz cullets being added to the outer melt zone. 10. The method as set forth in claim 9 wherein the weir is a first weir, the crucible assembly comprising a second weir radially inward to the first weir, the first weir and second weir defining a middle melt zone between the first weir and the second weir, the second weir defining an inner melt zone within the second weir. 11. The method as set forth in claim 1 wherein the melt of silicon in the crucible assembly is formed by adding an initial charge of solid polycrystalline silicon to the crucible assembly, the method comprising: adding the batch of quartz cullets to the initial charge of solid polycrystalline silicon; and melting the initial charge of solid polycrystalline silicon with the quartz cullets being disposed therein. 12. The method as set forth in claim 1 wherein the quartz cullets are less dense than the melt of silicon such that the quartz cullets float within the melt. 13. The method as set forth in claim 1 wherein the single crystal silicon ingot is the first ingot withdrawn from the melt after the melt of silicon in the crucible assembly is formed. 14. The method as set forth in claim 1 wherein the single crystal silicon ingot is a single crystal silicon ingot grown subsequent to a first single crystal silicon ingot being withdrawn from the melt. 15. The method as set forth in claim 1 wherein the batch of quartz cullets are not added to the melt while the main body of the single crystal silicon ingot is withdrawn from the melt. 16. The method as set forth in claim 1 wherein the batch of quartz cullets are not added to the melt while a neck and/or crown of the single crystal silicon ingot is withdrawn from the melt.

Assignees

Inventors

Classifications

  • C30B29/06Primary

    Silicon · CPC title

  • Controlling or regulating (controlling or regulating in general G05) · CPC title

  • adding crystallising materials or reactants forming it in situ to the melt · CPC title

  • C30B15/002Primary

    Continuous growth · CPC title

  • Double crucible methods · CPC title

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What does patent US11767610B2 cover?
Methods for producing single crystal silicon ingots by Continuous Czochralski (CCz) are disclosed. A batch of buffer members (e.g., quartz cullets) is added to an outer melt zone of the crucible assembly before the main body of the ingot is grown. In some embodiments, the ratio of the mass M of the batch of buffer members added to the melt to the time between adding the batch of buffer members …
Who is the assignee on this patent?
Globalwafers Co Ltd
What technology area does this patent fall under?
Primary CPC classification C30B29/06. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Tue Sep 26 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).