Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-11756791-B2
Application number	US-202017016600-A
Country	US
Kind code	B2
Filing date	Sep 10, 2020
Priority date	Mar 24, 2020
Publication date	Sep 12, 2023
Grant date	Sep 12, 2023

Abstract

According to one embodiment, a semiconductor device includes first and second electrodes, first, fourth, and sixth semiconductor regions of a first conductivity type, a junction region, a fifth semiconductor region of a second conductivity type, and a gate electrode. The junction region includes a second semiconductor region of the first conductivity type and a third second semiconductor region of the second conductivity type. The second semiconductor regions and the third semiconductor regions are alternately provided in a second direction perpendicular to a first direction. A concentration of at least one first element selected from the group consisting of a heavy metal element and a proton in the junction region is greater a concentration of the first element in the fourth semiconductor region, or a density of traps in the junction region is greater than that in the first semiconductor region and greater than that in the fourth semiconductor region.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a first electrode;
a first semiconductor region provided on the first electrode and electrically connected to the first electrode, the first semiconductor region being of a first conductivity type;
a junction region provided on the first semiconductor region, the junction region including
a second semiconductor region of the first conductivity type, an impurity concentration of the first conductivity type in the second semiconductor region being less than an impurity concentration of the first conductivity type in the first semiconductor region, and
a third semiconductor region of a second conductivity type,
a plurality of the second semiconductor regions and a plurality of the third semiconductor regions being alternately provided in a second direction perpendicular to a first direction, the first direction being from the first electrode toward the first semiconductor region;

a fourth semiconductor region provided around the junction region along a first plane perpendicular to the first direction, the fourth semiconductor region being of the first conductivity type, an impurity concentration of the first conductivity type in the fourth semiconductor region being less than the impurity concentration of the first conductivity type in the first semiconductor region;
a fifth semiconductor region provided on one of the plurality of third semiconductor regions, the fifth semiconductor region being of the second conductivity type;
a sixth semiconductor region provided on the fifth semiconductor region, the sixth semiconductor region being of the first conductivity type;
a gate electrode facing the fifth semiconductor region via a gate insulating layer; and
a second electrode provided on the fifth and sixth semiconductor regions, the second electrode being electrically connected to the fifth and sixth semiconductor regions,
wherein a concentration of a first element in the junction region is greater than a concentration of the first element in the first semiconductor region and greater than a concentration of the first element in the fourth semiconductor region, the first element is at least one selected from the group consisting of a heavy metal element and a proton, a ratio of a concentration of the first element in a middle portion of the junction region to a concentration of the first element in an upper portion of the junction region is not less than 0.6 and not more than 1.4, a ratio of a concentration of the first element in a lower portion of the junction region to the concentration of the first element in each of the upper portion and the middle portion is 0.1 or less, or
wherein a density of traps in the junction region is greater than a density of traps in the first semiconductor region and greater than a density of traps in the fourth semiconductor region, a ratio of a density of traps in a middle portion of the junction region to a density of traps in an upper portion of the junction region is not less than 0.6 and not more than 1.4, a ratio of a density of traps in a lower portion of the junction region to the density of traps in each of the upper portion and the middle portion is 0.1 or less.

2. The device according to claim 1 , wherein
concentrations of the first element in the second and third semiconductor regions each are greater than the concentration of the first element in the first semiconductor region and greater than the concentration of the first element in the fourth semiconductor region, or
densities of traps in the second and third semiconductor regions each are greater than the density of traps in the first semiconductor region and greater than the density of traps in the fourth semiconductor region.

3. The device according to claim 1 , wherein
the concentration of the first element in the junction region is greater than the concentration of the first element in the first semiconductor region and greater than the concentration of the first element in the fourth semiconductor region, and
the first element is at least one selected from the group consisting of gold, ruthenium, rhodium, palladium, osmium, iridium, and platinum.

4. The device according to claim 3 , wherein
a ratio of a concentration of the first element in an upper portion of the junction region to a concentration of the first element in a middle portion of the junction region in the first direction is not less than 0.6 and not more than 1.4.

5. The device according to claim 3 , wherein
the concentration of the first element in the junction region is not less than 4 times and not more than 50 times each of the concentration of the first element in the first semiconductor region and the concentration of the first element in the fourth semiconductor region.

6. The device according to claim 1 , further comprising:
a seventh semiconductor region provided between the first electrode and the first semiconductor region, the seventh semiconductor region being of the first conductivity type and including a higher first-conductivity-type impurity concentration than the first semiconductor region.

7. The device according to claim 1 , wherein
the concentration of the first element in the junction region is not less than 4 times the concentrations of the first element in the first semiconductor region and the fourth semiconductor region and not more than 50 times the concentrations of the first element in the first semiconductor region and the fourth semiconductor region, or
the density of traps in the junction region is not less than 4 times the densities of traps in the first semiconductor region and the fourth semiconductor region and not more than 50 times the densities of traps in the first semiconductor region and the fourth semiconductor region.

8. The device according to claim 1 , wherein
the upper portion contacts with the fifth semiconductor region,
the lower portion contacts with the first semiconductor region, and
the middle portion is positioned between the lower portion and the upper portion in the first direction.

9. A semiconductor device, comprising:
a first electrode;
a first semiconductor region provided on the first electrode and electrically connected to the first electrode, the first semiconductor region being of a first conductivity type;
a junction region provided on the first semiconductor region, the junction region including
a second semiconductor region of the first conductivity type, an impurity concentration of the first conductivity type in the second semiconductor region being less than an impurity concentration of the first conductivity type in the first semiconductor region, and
a third semiconductor region of a second conductivity type,
a plurality of the second semiconductor regions and a plurality of the third semiconductor regions being alternately provided in a second direction perpendicular to a first direction, the first direction being from the first electrode toward the first semiconductor region;

a fourth semiconductor region provided around the junction region along a first plane perpendicular to the first direction, the fourth semiconductor region being of the first conductivity type, an impurity concentration of the first conductivity type in the fourth semiconductor region being less than the impurity concentration of the first conductivity type in the first semiconductor region;
a fifth semiconductor region provided on one of the plurality of third semiconductor regions, the fifth semiconductor region being of the second conductivity type;
a sixth semiconductor region provided on the fifth semiconductor region, the sixth semiconductor region being of the first conductivity type;
a gate electrode facing the fifth sem

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Sato Shingo
• FUJINO Yuhki
• Yamashita Hiroaki

Classifications

• H10P30/208

  of electrically inactive species · CPC title

• H10P30/204

  into Group IV semiconductors · CPC title

• H10P32/171

  being group IV material · CPC title

• H10P32/18 Primary

  Diffusion lifetime killers · CPC title

• H10D62/058

  by using trenches, e.g. implanting into sidewalls of trenches or refilling trenches · CPC title