Methods and apparatus for processing a substrate

US11749532B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11749532-B2
Application numberUS-202117307383-A
CountryUS
Kind codeB2
Filing dateMay 4, 2021
Priority dateMay 4, 2021
Publication dateSep 5, 2023
Grant dateSep 5, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods and apparatus for processing a substrate are provided. For example, a method of processing a substrate comprises supplying oxygen (O2) into a processing volume of an etch chamber to react with a silicon-based hardmask layer atop a base layer of ruthenium to form a covering of an SiO-like material over the silicon-based hardmask layer and etching the base layer of ruthenium using at least one of O2 or chloride (Cl2) while supplying nitrogen (N2) to sputter some of the SiO-like material onto an exposed ruthenium sidewall created during etching.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of processing a substrate, comprising: supplying oxygen (O 2 ) into a processing volume of an etch chamber to react with a silicon-based hardmask layer atop a base layer of ruthenium to form a covering of an SiO over the silicon-based hardmask layer; etching the base layer of ruthenium using at least one of O 2 or chloride (Cl 2 ) while supplying nitrogen (N 2 ) to sputter some of the SiO onto an exposed ruthenium sidewall created during etching, wherein etching the base layer of ruthenium further comprises providing: a source power at a first power level at an operating frequency from about 50 KHz to about 150 MHz; and a bias power at a second power level different from the first power level at an operating frequency from about 400 KHz to about 60 MHz; and tuning a line profile of the exposed ruthenium sidewall by adjusting a flow rate of the nitrogen (N 2 ) supplied to sputter the SiO to about 200 sccm to control an amount of the base layer of ruthenium that is etched. 2. The method of claim 1 , further comprising etching the base layer of ruthenium to form multiple interconnect lines. 3. The method of claim 2 , wherein the multiple interconnect lines have a pitch of about 14 nm to about 28 nm. 4. The method of claim 2 , wherein the multiple interconnect lines have a pitch of about 24 nm. 5. The method of claim 1 , wherein the silicon-based hardmask layer comprises at least one of silicon (Si), silicon oxide (SiO), silicon nitride (SiN), or silicon carbide (SiC). 6. The method of claim 1 , wherein supplying oxygen (O 2 ) into the processing volume further comprises providing: a source power of about 1500 W at an operating frequency from about 50 kHz to about 150 MHz; a bias power of about 40 Wat an operating frequency from about 400 kHz to about 60 MHZ; a chuck temperature of about 50° C.; a pressure inside the etch chamber of about 10 mTorr; and the oxygen (O 2 ) at about 200 sccm. 7. The method of claim 1 , wherein the first power level is about 500 W and the second power level is about 200 W and etching the base layer of ruthenium further comprises providing: a chuck temperature of about 50° C.; a pressure inside the etch chamber of about 10 mTorr; the oxygen (O 2 ) at about 200 sccm when used; and the chloride (Cl 2 ) at about 40 sccm when used. 8. A non-transitory computer readable storage medium having stored thereon instructions that when executed by a processor perform a method of a processing a substrate, the method comprising: supplying oxygen (O 2 ) into a processing volume of an etch chamber to react with a silicon-based hardmask layer atop a base layer of ruthenium to form a covering of SiO over the silicon-based hardmask layer; etching the base layer of ruthenium using at least one of O 2 or chloride (Cl 2 ) while supplying nitrogen (N 2 ) to sputter some of the SiO onto an exposed ruthenium sidewall created during etching, wherein etching the base layer of ruthenium further comprises providing: a source power at a first power level at an operating frequency from about 50 KHz to about 150 MHz; and a bias power at a second power level different from the first power level at an operating frequency from about 400 kHz to about 60 MHz; and tuning a line profile of the exposed ruthenium sidewall by adjusting a flow rate of the nitrogen (N 2 ) supplied to sputter the SiO to about 200 sccm to control an amount of the base layer of ruthenium that is etched. 9. The non-transitory computer readable storage medium of claim 8 , further comprising etching the base layer of ruthenium to form multiple interconnect lines. 10. The non-transitory computer readable storage medium of claim 9 , wherein the multiple interconnect lines have a pitch of about 14 nm to about 28 nm. 11. The non-transitory computer readable storage medium of claim 9 , wherein the multiple interconnect lines have a pitch of about 24 nm. 12. The non-transitory computer readable storage medium of claim 8 , wherein the silicon-based hardmask layer comprises at least one of silicon (Si), silicon oxide (SiO), silicon nitride (SiN), or silicon carbide (SiC). 13. The non-transitory computer readable storage medium of claim 8 , wherein supplying oxygen (O 2 ) into the processing volume further comprises providing: a source power of about 1500 Wat an operating frequency from about 50 kHz to about 150 MHz; a bias power of about 40 Wat an operating frequency from about 400 KHz to about 60 MHZ; a chuck temperature of about 50° C.; a pressure inside the etch chamber of about 10 mTorr; and the oxygen (O 2 ) at about 200 sccm. 14. The non-transitory computer readable storage medium of claim 8 , wherein the first power level is about 500 W and the second power level is about 200 Wand etching the base layer of ruthenium further comprises providing: a chuck temperature of about 50° C.; a pressure inside the etch chamber of about 10 mTorr; the oxygen (O 2 ) at about 200 sccm when used; and the chloride (Cl 2 ) at about 40 sccm when used. 15. An etch chamber, comprising: a gas panel configured to supply an etchant into a processing volume of the etch chamber; a controller configured to: supply oxygen (O 2 ) into the processing volume of the etch chamber to react with a silicon-based hardmask layer atop a base layer of ruthenium to form a covering of SiO over the silicon-based hardmask layer; etch the base layer of ruthenium using at least one of O 2 or chloride (Cl 2 ) while supplying nitrogen (N 2 ) to sputter some of the SiO onto an exposed ruthenium sidewall created during etching, wherein etching the base layer of ruthenium further comprises providing: a source power at a first power level at an operating frequency from about 50 kHz to about 150 MHz; and a bias power at a second power level different from the first power level at an operating frequency from about 400 KHz to about 60 MHz; and tune a line profile of the exposed ruthenium sidewall by adjusting a flow rate of the nitrogen (N 2 ) supplied to sputter the SiO to about 200 sccm to control an amount of the base layer of ruthenium that is etched. 16. The etch chamber of claim 15 , wherein the controller is further configured to etch the base layer of ruthenium to form multiple interconnect lines. 17. The etch chamber of claim 16 , wherein the multiple interconnect lines have a pitch of about 14 nm to about 28 nm.

Assignees

Inventors

Classifications

  • using subtractive patterning of the conductive members · CPC title

  • characterised by their composition, e.g. multilayer masks · CPC title

  • for drying etching · CPC title

  • H10P50/71Primary

    using masks for conductive or resistive materials · CPC title

  • the principal metal being a noble metal, e.g. gold · CPC title

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What does patent US11749532B2 cover?
Methods and apparatus for processing a substrate are provided. For example, a method of processing a substrate comprises supplying oxygen (O2) into a processing volume of an etch chamber to react with a silicon-based hardmask layer atop a base layer of ruthenium to form a covering of an SiO-like material over the silicon-based hardmask layer and etching the base layer of ruthenium using at leas…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10P50/71. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 05 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).