Use of siilicon photonics (SiP) for computer network interfaces

Patent metadata

Field	Value
Publication number	US-11736206-B2
Application number	US-202117167758-A
Country	US
Kind code	B2
Filing date	Feb 4, 2021
Priority date	Mar 19, 2020
Publication date	Aug 22, 2023
Grant date	Aug 22, 2023

Abstract

A silicon photonics (SiP) chip includes MAC and PHY blocks interconnected by optical waveguides (560) to provide network interface for a computer system. The SiP chip may be formed in a package mounted to the computer's motherboard. In an example, the computer system is a blade server module mounted in a datacenter chassis.

First claim

What is claimed is:

1. An apparatus comprising:
a silicon photonics chip (SiP chip) including:
a network interface circuit that is configured to allow the SiP chip to communicate over a network with devices that are located outside of the SiP chip, wherein the network interface circuit includes:
a media access controller (MAC) that is configured to allow the SiP chip to communicate over the network;
a physical layer interface device (PHY) that is configured to allow the SiP chip to communicate over the network; and
one or more optical waveguides that are configured to carry data and/or control signals between the MAC and the PHY.

2. The apparatus of claim 1 , wherein the network interface circuit includes:
a controller that is configured to control the network interface circuit, wherein the one or more optical waveguides are configured to carry the data and/or the control signals to and/or from the controller.

3. The apparatus of claim 1 , wherein the network interface circuit includes:
a buffer memory that is configured to temporarily store network data transmitted through the network interface circuit, wherein the one or more optical waveguides are configured to carry the data and/or the control signals to and/or from the buffer memory.

4. The apparatus of claim 1 , wherein the network interface circuit includes:
one or more electro/optical converters that are configured to convert between optical data processed by the network interface circuit and electrical data received by the network interface circuit.

5. The apparatus of claim 1 , wherein the network interface circuit includes:
one or more ports that are configured to connect to one or more circuits that are located outside of the SiP chip.

6. The apparatus of claim 5 , wherein the one or more ports include one or more optical ports that are connected to one or more electro/optical converters.

7. The apparatus of claim 5 , wherein the SiP chip is mounted on a wiring board that includes a bus that is configured to carry signals between the SiP chip and a processor.

8. The apparatus of claim 7 , wherein the bus includes an optical bus.

9. The apparatus of claim 1 , wherein the SiP chip is included in a module that is configured to plug into a chassis in order to connect the module to other modules.

10. The apparatus of claim 9 , wherein the other modules are configured to provide a network switch fabric.

11. The apparatus of claim 1 , wherein:
the SiP chip is one of a plurality of SiP chips, wherein each of the plurality of SiP chips include a respective network interface circuit that is configured to allow that SiP chip to communicate over the network with devices that are located outside of that SiP chip, and wherein the respective network interface circuit in each of the plurality of SiP chip includes:
a respective media access controller (MAC) that is configured to allow that SiP chip to communicate over the network;
a respective physical layer interface device (PHY) that is configured to allow that SiP chip to communicate over the network; and
one or more respective optical waveguides that are configured to transmit data and/or control signals between the respective MAC and the respective PHY in that SIP chip.

12. The apparatus of claim 11 , further comprising:
a buffer memory that is shared by the plurality of SiP chips and that is configured to temporarily store network data transmitted through the respective network interface circuits.

13. A method for transmitting data between a computer system and a network, the method comprising:
(1) transmitting the data from the computer system to the network;
(2) receiving the data from the network by the computer system, wherein operation (1) includes:
(1a) receiving the data by a silicon photonics chip (SiP chip) included in the computer system, wherein the SiP chip includes a network interface circuit including:
a media access controller (MAC) that is configured to allow the SiP chip to communicate over the network;
a physical layer interface device (PHY) that is configured to allow the SiP chip to communicate over the network; and
one or more optical waveguides that are configured to transmit data and/or control signals between the MAC and the PHY;

(1b) operating, by the SiP chip, the MAC and the PHY to transmit the data to the network, and

wherein operation (2) includes operating the MAC and the PHY to receive the data by the SiP for the computer system.

14. The method of claim 13 , wherein the network interface circuit includes:
a controller that is configured to control the network interface circuit, wherein the one or more optical waveguides are configured to transmit the data and/or the control signals to and/or from the controller.

15. The method of claim 13 , wherein the network interface circuit includes:
a buffer memory that is configured to temporarily store the data in operation (1) or (2).

16. The method of claim 13 , wherein the network interface circuit includes:
one or more electro/optical converters that is configured to convert between optical data processed by the network interface circuit and electrical data received by the network interface circuit.

17. The method of claim 13 , wherein the network interface circuit includes:
one or more ports that are connected to one or more circuits that are located outside of the SiP chip.

18. The method of claim 17 , wherein the one or more ports include one or more optical ports that are connected to one or more electro/optical converters.

19. The method of claim 15 , wherein the SiP chip is mounted on a wiring board including an optical bus that is configured to carry signals between the SiP chip and a processor in the computer system.

20. The method of claim 13 , wherein the computer system is included in a module that is plugged into a chassis and that connects the network interface circuit to a network switch fabric provided in the chassis.

Assignees

• Dell Products Lp

Inventors

• Rathinasamy Shree
• Teeter Victor B

Classifications

• H04B10/801 Primary

  using optical interconnects, e.g. light coupled isolators, circuit board interconnections · CPC title

• G02B6/42

  Coupling light guides with opto-electronic elements · CPC title

• G02B6/4246

  Bidirectionally operating package structures · CPC title

• G06F13/4027 Primary

  using bus bridges (G06F13/4022 takes precedence) · CPC title

• H04Q11/0005

  Switch and router aspects · CPC title