Built-in self test for loopback on communication system on chip

Patent metadata

Field	Value
Publication number	US-9548809-B1
Application number	US-201414310988-A
Country	US
Kind code	B1
Filing date	Jun 20, 2014
Priority date	Jul 11, 2013
Publication date	Jan 17, 2017
Grant date	Jan 17, 2017

Abstract

In an example, the present invention includes an integrated system-on-chip device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.

First claim

What is claimed is:

1. An integrated system-on-chip device, the device comprising:
a single silicon substrate member;
a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol;
an input/output block provided on the substrate member and coupled or the data input/output interface, the input/output block comprising a SerDes block, a CDR block, a compensation block, and an equalizer block;
a signal processing block provided on the substrate member and coupled to the input/output block, the signal processing block configured to the input/output block using a bi-direction bus in an intermediary protocol;
a driver module provided on the substrate member and coupled to the signal processing block using a uni-directional multi-lane bus;
a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device, the driver interface being configured to transmit output data in either an amplitude modulation format or a combination of phase/amplitude modulation format or a phase modulation format;
a receiver module comprising a TIA block provided on the substrate member and to be coupled to the silicon photonics device using predefined modulation format, and configured to the signal processing block to communicate information to the input/output block for transmission through the data input/output interface;
a communication block provided on the substrate member and operably coupled to the input/output block, the signal processing block, the driver block, and the receiver block;
a communication interface coupled to the communication block;
a control block provided on the substrate member and coupled to the communication block; and
a self-test block provided on the substrate member, the self test block comprising a broad band source coupled to each of a TX multiplexer and a RX multiplexer associated with the silicon photonics device and being configured to receive a loop back signal from at least one of the digital signal processing block, the driver module, or the silicon photonics device.

2. The device of claim 1 wherein the signal processing block comprises a FEC block, a digital signal processing block, a framing block, a protocol block, and a redundancy block.

3. The device of claim 1 wherein the driver module is selected from a current driver or a voltage driver.

4. The device of claim 1 wherein the driver module is a differential driver.

5. The device of claim 1 wherein the driver module comprises N channels respectively associated with N lasers generated using N photodiodes and controlled by thermo-electric tuners and phase modulation controller before processed by an electro absorption modulator using either DC or RF control signals, each laser being associated with a different wavelength that is separately controlled and locked via a loop back using a detected error signal by a detector from a taped signal based on N-to-1 multiplexed laser output.

6. The device of claim 1 wherein the silicon photonics device is selected from an electro absorption modulator or electro optic modulator, or a Mach-Zehnder.

7. The device of claim 1 wherein the amplified modulation format is selected from NRZ format or PAM format.

8. The device of claim 1 wherein the phase modulation format is selected from BPSK or nPSK.

9. The device of claim 1 wherein the phase/amplitude modulation is QAM.

10. The device of claim 1 wherein the silicon photonic device is configured to convert the output data into an output transport data in a WDM signal.

11. The device of claim 1 wherein the control block is configured to initiate a laser bias or a modulator bias.

12. The device of claim 1 wherein the control block is configured for laser bias and power control of the silicon photonics device.

13. The device of claim 1 wherein the control block is configured with a thermo-electric tuning or carrier tuning device each of which is configured on the silicon photonics device.

14. The device of claim 1 wherein the SerDes block is configured to convert a first N numbers of data streams into a second M numbers of data streams.

15. The device of claim 1 wherein the self test block comprises a variable output power switch configured to provide a receiver stress test from the loop back signal.

Assignees

• Inphi Corp

Inventors

• Nagarajan Radhakrishnan L

Classifications

• H04B10/071 Primary

  using a reflected signal, e.g. using optical time domain reflectometers [OTDR] · CPC title

• H04L43/50

  Testing arrangements · CPC title

• H04Q11/0005

  Switch and router aspects · CPC title

• H04Q2011/0018

  using tunable transmitters or receivers · CPC title

• H04L49/109

  Integrated on microchip, e.g. switch-on-chip · CPC title