Open compute project network card converted to PCIe riser

Patent metadata

Field	Value
Publication number	US-10140238-B2
Application number	US-201615069395-A
Country	US
Kind code	B2
Filing date	Mar 14, 2016
Priority date	Mar 14, 2016
Publication date	Nov 27, 2018
Grant date	Nov 27, 2018

Abstract

An Open Compute Project (OCP) mezzanine riser with repurposed connectivity to allow for increased PCIe card count on a motherboard server. The OCP mezzanine riser includes at least one OCP connector, where the OCP connectors are mounted on the bottom of the mezzanine riser card and mate with at least one of three OCP connection points that are mounted on a server motherboard. Further, the OCP mezzanine riser includes one or more PCIe lanes mounted on the top of the mezzanine riser card, where a PCIe card may be connected to the one or more PCIe lanes of the mezzanine riser.

First claim

What is claimed is:

1. An information handling system comprising:
a motherboard;
a chassis configured to house one or more components of the information handling system;
one or more Open Compute Project (OCP) connection points coupled to the motherboard, the OCP connection points designated for an OCP mezzanine card;
one or more power and sideband connection points coupled to the motherboard, wherein the power and sideband connection points provide a current and sideband signal required by a PCIe card;
an OCP mezzanine riser coupled to the one or more OCP connection points, wherein the OCP mezzanine riser comprises:
a circuit board;
at least one connector mounted on a first side of circuit board coupled with at least one OCP connection point of the server motherboard; and
one or more PCIe lanes mounted on a second side of the circuit board, wherein a PCIe card is inserted into each of the one or more PCIe lanes of the OCP mezzanine riser.

2. The information handling system of claim 1 , wherein the OCP mezzanine riser comprises:
at least one additional connector mounted on the first side of the mezzanine riser card and configured to mate with at least one power connector on the server motherboard, wherein the additional connector provides both power and sideband signal for a PCIe card.

3. The information handling system of claim 1 , wherein the OCP mezzanine riser is horizontally oriented, parallel to the motherboard of a server, wherein a PCIe card may be connected and oriented perpendicular to the motherboard.

4. The information handling system of claim 1 , further comprising a right angle PCIe card edge connector, wherein the PCIe card edge connector is connected to a horizontally oriented OCP mezzanine riser so that a PCIe card may be connected and oriented parallel to the motherboard.

5. The information handling system of claim 1 , wherein the OCP mezzanine riser is vertically oriented, perpendicular to the motherboard of a server, wherein a PCIe card may be connected and oriented parallel to the motherboard.

6. The information handling system of claim 1 , wherein the OCP mezzanine riser is coupled to only one OCP connection point on a server mother board, wherein the only one OCP connection point is an OCP type A connection point and provides connectivity for one x8 PCIe lane.

7. The information handling system of claim 1 , wherein the OCP mezzanine riser is coupled to at least two OCP connection points on a server mother board, wherein the at least two OCP connection points comprise an OCP type A connection point and an OCP type B connection point, wherein the OCP connection points act separately to provide connectivity for two x8 PCIe lanes.

8. The information handling system of claim 1 , wherein the OCP mezzanine riser is coupled to at least two OCP connection points on a server mother board, wherein the at least two OCP connection points are an OCP type A connection point and an OCP type B connection point, wherein the OCP connection points act contiguously to provide connectivity for one x16 PCIe lane.

9. The information handling system of claim 1 , further comprising a SERDES network card, the SERDES network card coupled to an OCP type C connection point of the server motherboard.

10. An Open Compute Project (OCP) mezzanine riser, comprising:
a circuit board;
at least two OCP connectors mounted on a first side of the circuit board and configured to mate with at least two OCP connection points on a server mother board, wherein the at least two OCP connection points comprise an OCP type A connection point and an OCP type B connection point, wherein the OCP connection points act either separately or contiguously; and
one or more PCIe lanes mounted on a second side of the circuit board, wherein a PCIe card is inserted into each of the one or more PCIe lanes of the OCP mezzanine riser.

11. The OCP mezzanine riser of claim 10 , further comprising:
at least one additional connector mounted on the first side of the mezzanine riser and configured to mate with at least one power connector on the server motherboard, wherein the additional connector provides both power and sideband signal for a PCIe card.

12. The OCP mezzanine riser of claim 10 , wherein the mezzanine riser comprises a single OCP connector configured to mate with a single OCP connection point on the server mother board, wherein the single OCP connection point comprises an OCP type A connection point.

13. The OCP mezzanine riser of claim 10 , wherein the mezzanine riser comprises at least three OCP connectors configured to mate with at least three OCP connection points on the server mother board, wherein the three OCP connection points comprise an OCP type A connection point, an OCP type B connection point, and an OCP type C SERDES connection point, wherein the SERDES connection point allows for an upgraded Ethernet pathway.

14. The OCP mezzanine riser of claim 10 , wherein the connectors on the mezzanine riser are FCI type connectors.

Assignees

• Dell Products Lp

Inventors

• Mundt Kevin Warren
• Ramsey Scott Michael

Classifications

• G06F2213/0026

  PCI express · CPC title

• G06F13/409 Primary

  Mechanical coupling (back panels H05K7/1438) · CPC title

• G06F13/4068

  Electrical coupling · CPC title

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title