Power modules for ultra-fast wide-bandgap power switching devices

Patent metadata

Field	Value
Publication number	US-11735492-B2
Application number	US-202117465345-A
Country	US
Kind code	B2
Filing date	Sep 2, 2021
Priority date	Dec 10, 2018
Publication date	Aug 22, 2023
Grant date	Aug 22, 2023

Abstract

Low inductance power modules for ultra-fast wide-bandgap semiconductor power switching devices are disclosed. Conductive tracks define power buses for a switching topology, e.g. comprising GaN E-HEMTs, with power terminals extending from the power buses through the housing to provide a heatsink-to-busbar distance which meets creepage and clearance requirements. Low-profile, low-inductance terminals for gate and source-sense connections extend from contact areas located adjacent each power switching device to provide for a low inductance gate drive loop, for high di/dt switching. The gate driver board is mounted on the low-profile terminals, inside or outside of the housing, with decoupling capacitors provided on the driver board. For paralleled switches, additional terminals, which are referred to as dynamic performance pins, are provided to the power buses. These pins are configured to provide a low inductance path for high-frequency current and balance inductances of the power commutation loops for each switch.

First claim

The invention claimed is:

1. A power module for a wide-bandgap power semiconductor switch comprising:
a housing comprising a baseplate and a cover, the baseplate defining a footprint of generally rectangular form comprising ends having a width and sides having a length;
a power substrate in thermal contact with the baseplate, a topology of the power substrate being configured for mounting thereon of a plurality of wide-bandgap semiconductor power switching devices arranged as first and second rows extending along a length of the power substrate, the first row comprising high-side device positions and the second row comprising low-side device positions;
the power substrate comprising an arrangement of conductive tracks defining a plurality of power buses and a plurality of gate drive contact areas for the plurality of wide-bandgap semiconductor power switching devices, wherein:
the power buses extend lengthwise adjacent to said first and second rows of high-side and low-side device positions;
the plurality of gate drive contact areas being arranged as first and second rows adjacent to said first and second rows of high-side and low-side device positions;

a plurality of power terminal members, each power terminal member extending from one of the power buses on the power substrate, through a cover of the housing, to a power terminal at a height h 1 from a base of the baseplate that meets creepage and clearance requirements;
a plurality of gate drive terminal members, each gate drive terminal member extending from one of the gate drive contact areas through the cover of the housing; and
a plurality of dynamic performance terminal members extending from the power buses, adjacent each power switching device, the dynamic performance terminal members being arranged to provide a low inductance path for high frequency current and balance power commutation loops of each wide-bandgap semiconductor power switching device.

2. The power module of claim 1 , wherein the plurality of gate drive terminal members comprise gate terminals and source-sense terminals for each wide-bandgap semiconductor power switching device, the gate drive terminal members extending to a height h 2 , which is less than h 1 , to provide low-profile terminals for low stray inductance of a gate drive loop for each wide-bandgap semiconductor power switching device.

3. The power module of claim 2 , wherein the plurality of dynamic performance terminal members extend to said height h 2 , to provide low-profile terminals for low stray inductance of the power commutation loop for each wide-bandgap semiconductor switching device.

4. A power module comprising:
a housing comprising a baseplate and a cover, the baseplate defining a footprint of the power module;
a power substrate in thermal contact with the baseplate, a topology of the power substrate being configured for mounting thereon of a plurality of wide-bandgap semiconductor power switching devices arranged as first and second rows extending along a length of the power substrate, the first row comprising high-side device positions and the second row comprising low-side device positions;
the power substrate comprising an arrangement of conductive tracks defining a plurality of power buses, wherein:
the power buses extend lengthwise adjacent to said first and second rows of high-side and low-side device positions;

first and second rows of contact areas are arranged adjacent to said first and second rows of high side and low side device positions, the contact areas comprising gate drive contact areas for each the plurality of wide-bandgap semiconductor power switching devices;
a plurality of power terminal members, each power terminal member extending from one of the power buses on the power substrate to a power terminal;
a plurality of gate drive terminal members, each gate drive terminal member extending from one of the gate drive contact areas for connection to a gate driver board; and
a plurality of dynamic performance terminal members extending from the power buses, adjacent each wide-bandgap semiconductor power switching device, for connection to the gate driver board, the dynamic performance terminal members having an arrangement that balances inductances of power commutation loops of each power switching device and provides a low inductance path for high frequency current.

Assignees

• Gan Systems Inc
• Gan Svstems Inc

Inventors

• Lu Juncheng
• Chen Di
• Spaziani Larry
• Di Maso Peter Anthony

Classifications

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W70/611 Primary

  for connecting multiple chips together · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W72/5445

  being orthogonal to a side surface of the chip, e.g. parallel arrangements · CPC title