Multi-phase common contact package

Patent metadata

Field	Value
Publication number	US-10204847-B2
Application number	US-201615287328-A
Country	US
Kind code	B2
Filing date	Oct 6, 2016
Priority date	Oct 6, 2016
Publication date	Feb 12, 2019
Grant date	Feb 12, 2019

Abstract

In some examples, a device includes a first leadframe segment and a second leadframe segment, wherein the second leadframe segment is electrically isolated from the first leadframe segment. The device further includes at least four transistors comprising at least two high-side transistors electrically connected to the first leadframe segment and at least two low-side transistors electrically connected to the second leadframe segment. The device further includes at least two conductive output elements, wherein each conductive output element of the at least two conductive output elements is electrically connected to a respective high-side transistor of the at least two high-side transistors and a respective low-side transistor of the at least two low-side transistors. The device further includes an integrated circuit electrically connected to a control terminal of each transistor of the at least four transistors.

First claim

What is claimed is:

1. A device comprising:
at least four transistors comprising at least two high-side transistors and at least two low-side transistors;
a first leadframe segment positioned on a first side of the at least two high-side transistors and electrically connected to the at least two high-side transistors;
a second leadframe segment positioned on a first side of the at least two low-side transistors and electrically connected to the at least two low-side transistors, wherein the first side of the at least two high-side transistors and the first side of the at least two low-side transistors are a same side, and wherein the second leadframe segment is electrically isolated from the first leadframe segment;
at least two conductive output elements, wherein each conductive output element of the at least two conductive output elements is positioned on a second side of a respective high-side transistor of the at least two high-side transistors and positioned on a second side of a respective low-side transistor of the at least two low-side transistors, wherein the second side of each respective high-side transistor of the at least two high-side transistors and the second side of each respective low-side transistor of the at least two low-side transistors are a same side, and wherein each conductive output element of the at least two conductive output elements is electrically connected to a respective high-side transistor of the at least two high-side transistors and a respective low-side transistor of the at least two low-side transistors; and
an integrated circuit (IC) electrically connected to a control terminal of each transistor of the at least four transistors.

2. The device of claim 1 , further comprising a molding compound encapsulating the at least four transistors and at least partially encapsulating the IC.

3. The device of claim 1 , further comprising at least four wire bonds, wherein the IC is electrically connected to the control terminal of each transistor of the at least four transistors by a respective wire bond of the at least four wire bonds.

4. The device of claim 1 , further comprising at least four solder bumps, wherein the IC is electrically connected to the control terminal of each transistor of the at least four transistors by a respective solder bump of the at least four solder bumps.

5. The device of claim 1 , further comprising at least four copper pillars, wherein the IC is electrically connected to the control terminal of each transistor of the at least four transistors by a respective copper pillar of the at least four copper pillars.

6. The device of claim 1 , further comprising a multiphase motor driver including the first leadframe segment, the second leadframe segment, the at least four transistors, the at least two conductive output elements, and the IC, wherein each transistor of the at least four transistors comprises a vertical power transistor.

7. The device of claim 1 , wherein:
each conductive output element of the at least two conductive output elements comprises a metal layer; and
each conductive output element of the at least two conductive output elements is electrically isolated from all other conductive output elements of the at least two conductive output elements.

8. The device of claim 1 , further comprising at least four conductive control elements, wherein:
each conductive control element of the at least four conductive control elements is electrically connected to a control terminal of each respective transistor of the at least four transistors;
the IC is electrically connected to each conductive control element of the at least four conductive control elements; and
each conductive control element of the at least four conductive control elements comprises a metal layer.

9. A method for constructing a power electronics device package, the method comprising:
electrically connecting a first side of each high-side transistor of at least two high-side transistors of at least four transistors to a first leadframe segment;
electrically connecting a first side of each low-side transistor of at least two low-side transistors of the at least four transistors to a second leadframe segment, wherein the first side of the at least two high-side transistors and the first side of the at least two low-side transistors are a same side, and wherein the first leadframe segment is electrically isolated from the second leadframe segment;
electrically connecting each conductive output element of at least two conductive output elements to a second side of a respective high-side transistor of the at least two high-side transistors and a second side of a respective low-side transistor of the at least two low-side transistors, wherein the second side of each respective high-side transistor of the at least two high-side transistors and the second side of each respective low-side transistor of the at least two low-side transistors are a same side; and
electrically connecting an integrated circuit (IC) to a control terminal on a second side of each transistor of the at least four transistors.

10. The method of claim 9 , further comprising:
encapsulating the at least four transistors in a molding compound; and
at least partially encapsulating the IC in the molding compound.

11. The method of claim 9 , wherein electrically connecting the IC to the control terminal of each high-side transistor comprises:
electrically connecting a wire bond of at least four wire bonds to a control terminal of each respective transistor of the at least four transistors; and
electrically connecting the at least four wire bonds to the IC.

12. The method of claim 9 , wherein electrically connecting the IC to the control terminal of each high-side transistor comprises:
soldering at least four solder bumps to the IC; and
electrically connecting each solder bump of the at least four solder bumps to a control terminal of each respective transistor of the at least four transistors.

13. The method of claim 9 , wherein electrically connecting the IC to the control terminal of each high-side transistor comprises:
electrically connecting each copper pillar of at least four copper pillars to a control terminal of each respective transistor of the at least four transistors; and
electrically connecting the at least four copper pillars to the IC.

14. The method of claim 9 , wherein each transistor of the at least four transistors comprises a vertical power transistor.

15. The method of claim 9 , wherein each conductive output element of the at least two conductive output elements comprises a metal layer.

16. The method of claim 9 , further comprising electrically connecting each conductive control element of at least four conductive control elements to a control terminal of each respective transistor of the at least four transistors, wherein:
each conductive control element of the at least four conductive control elements comprises a metal layer, and
electrically connecting the IC to a control terminal on the second side of each transistor of the at least four transistors comprises electrically connecting the IC to the at least four conductive control elements.

17. A multi-phase power device comprising:
a first leadframe segment;
a second leadframe segment, wherein the second leadframe segment is electrically isolated from the first leadframe segment;
at least four vertical transistors comprising at least two high-side vertical transistors electrically connected to the first leadframe segment and at least two low-side vertical transistors electrically connec

Assignees

• Infineon Technologies Americas Corp

Inventors

• Cho Eung San

Classifications

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/5525

  comprising copper [Cu] · CPC title

• H10W72/5524

  comprising aluminium [Al] · CPC title

• H10W72/5522

  comprising gold [Au] · CPC title