Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-11670697-B2
Application number	US-202117353606-A
Country	US
Kind code	B2
Filing date	Jun 21, 2021
Priority date	Nov 30, 2017
Publication date	Jun 6, 2023
Grant date	Jun 6, 2023

Abstract

A semiconductor device includes a substrate comprising a semiconductor fin, a gate structure over the semiconductor fin, and source/drain structures over the semiconductor fin and on opposite sides of the gate structure. The gate stack comprises a high-k dielectric layer; a first work function metal layer over the high-k dielectric layer; an oxide of the first work function metal layer over the first work function metal layer; and a second work function metal layer over the oxide of the first work function metal layer, in which the first and second work function metal layers have different compositions; and a gate electrode over the second work function metal layer.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate comprising a semiconductor fin;
a gate structure over the semiconductor fin, wherein the gate structure comprises:
a high-k dielectric layer;
a first work function metal layer over the high-k dielectric layer;
an oxide of the first work function metal layer over the first work function metal layer;
a second work function metal layer over the oxide of the first work function metal layer, wherein the first and second work function metal layers have different compositions;
a third work function metal layer between the first work function metal layer and the high-k dielectric layer, wherein the third work function metal layer and the second work function metal layer have a same composition;
a gate electrode over the second work function metal layer; and

source/drain structures over the semiconductor fin and on opposite sides of the gate structure.

2. The semiconductor device of claim 1 , wherein the first work function metal layer is a metal compound of a first element and a second element, and the second work function metal layer is a single-element metal of the second element.

3. The semiconductor device of claim 1 , wherein the second work function metal layer is a metal compound of a first element and a second element, and the first work function metal layer is a single-element metal of the second element.

4. The semiconductor device of claim 1 , wherein the first work function metal layer is a single-element metal of a first element, and the second work function metal layer is a single-element metal of a second element different from the first element.

5. The semiconductor device of claim 1 , wherein the first work function metal layer has a composition of X a1 Y 1-a1 and the second work function metal layer has a composition of X a2 Y 1-a2 , and a1+a2=1.

6. The semiconductor device of claim 1 , wherein the first work function metal layer has a composition of X a1 Y 1-a1 and the second work function metal layer has a composition of X a2 Y 1-a2 , and a1≠a2.

7. The semiconductor device of claim 1 , wherein a thickness of the oxide of the first work function metal layer is in a range from about 5 Å to about 30 Å.

8. The semiconductor device of claim 1 , wherein thicknesses of the first, second, and third work function metal layers are in a range from about 5 Å to about 15 Å.

9. A semiconductor device, comprising:
a substrate comprising a semiconductor fin;
a gate structure over the semiconductor fin, wherein the gate structure comprises:
a high-k dielectric layer;
a work function metal stack over the high-k dielectric layer, the work function metal stack comprising a first metallic layer, a second metallic layer over the first metallic layer, a third metallic layer over the second metallic layer, and an oxide layer between the second metallic layer and the third metallic layer, wherein the first and third metallic layer are metal compounds of a first element and a second element, and the second metallic layer is a single-element metal of the second element; and
a gate electrode disposed over the work function metal stack; and

source/drain structures over the semiconductor fin and on opposite sides of the gate structure.

10. The semiconductor device of claim 9 , wherein the oxide layer is an oxide of the second metallic layer.

11. The semiconductor device of claim 9 , wherein the first metallic layer and the third metallic layer have different thicknesses.

12. The semiconductor device of claim 9 , wherein the first element and the second element comprise Hf, Ti, Ta, W, Si, Co, Mo, N, O, So, Ge, P, B, Ga, As, La, Al, Cu, or S.

13. A semiconductor device, comprising:
a substrate comprising a semiconductor fin;
a gate structure over the semiconductor fin, wherein the gate structure comprises:
a high-k dielectric layer;
a first metallic layer over the high-k dielectric layer;
a second metallic layer over the first metallic layer;
an oxide layer over the second metallic layer, wherein the oxide layer is an oxide of the second metallic layer;
a third metallic layer over the oxide layer, wherein one of the second metallic layer and the third metallic layer has a composition that is the same as a composition of the first metallic layer; and
a gate electrode disposed over the third metallic layer; and

source/drain structures over the semiconductor fin and on opposite sides of the gate structure.

14. The semiconductor device of claim 13 , wherein the composition of the first metallic layer is a single-element metal.

15. The semiconductor device of claim 13 , wherein the composition of the first metallic layer is a metal compound.

16. The semiconductor device of claim 13 , wherein thicknesses of the first and second metallic layers are in a range from about 5 Å to about 15 Å.

17. The semiconductor device of claim 13 , wherein a thickness of the oxide layer is in a range from about 5 Å to about 30 Å.

18. The semiconductor device of claim 13 , wherein the composition of the second metallic layer is the same as the composition of the first metallic layer.

19. The semiconductor device of claim 13 , wherein the composition of the third metallic layer is the same as the composition of the first metallic layer.

20. The semiconductor device of claim 13 , wherein the second and third metallic layers have different compositions.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chiang Hsin-Che
• Tzeng Ju-Yuan
• Liang Chun-Sheng
• Yeh Chih-Yang
• Wang Shu-Hui
• Yeh Jeng-Ya David

Classifications

• H10D64/01318

  the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314) · CPC title

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10W20/062

  by smoothing of conductive parts, e.g. by planarisation · CPC title

• H10W20/48

  Insulating materials thereof · CPC title

• H10W20/44

  Conductive materials thereof · CPC title