Patterning of thin film capacitors in organic substrate packages

Patent metadata

Field	Value
Publication number	US-11651902-B2
Application number	US-201816024715-A
Country	US
Kind code	B2
Filing date	Jun 29, 2018
Priority date	Jun 29, 2018
Publication date	May 16, 2023
Grant date	May 16, 2023

Abstract

Embodiments herein relate to systems, apparatuses, processing, and techniques related to patterning one or more sides of a thin film capacitor (TFC) sheet, where the TFC sheet has a first side and a second side opposite the first side. The first side and the second side of the TFC sheet are metal and are separated by a dielectric layer, and the patterned TFC sheet is to provide at least one of a capacitor or a routing feature on a first side of a substrate that has the first side and a second side opposite the first side.

First claim

What is claimed is:

1. A method comprising:
providing a thin film capacitor (TFC) sheet, wherein the TFC sheet has a first side and a second side opposite the first side, wherein the first side of the TFC sheet is a first metal layer and the second side of the TFC sheet is a second metal layer and wherein the first side and the second side are separated by a dielectric layer;
removing a first portion of the first metal layer from the first side of the TFC sheet;
providing a substrate;
applying an adhesive layer on a side of the substrate;
physically coupling the first side of the TFC sheet with the side of the substrate using the adhesive layer;
removing a second portion of the second metal layer from the second side of the TFC; and
removing a third portion of the dielectric layer, the third portion of the dielectric layer between the removed second portion of the second metal layer of the second side of the TFC and the substrate.

2. The method of claim 1 , further comprising applying copper (Cu) to portions of the remaining second metal layer of the second side of the TFC sheet.

3. The method of claim 2 , further comprising creating a via through the TFC sheet and through the side of the substrate to expose an electrical component disposed within the substrate.

4. The method of claim 3 , further comprising applying a conductive metal coating to a surface of the via to electrically couple the electrical component disposed within the substrate and a metal of the second side of the TFC sheet.

5. The method of claim 1 , wherein the first metal layer of the first side of the TFC or the second metal layer of the second side of the TFC includes a selected one or more of: copper (Cu) or nickel (Ni).

6. The method of claim 1 , wherein the dielectric layer includes barium, titanium, and oxygen.

7. The method of claim 1 , wherein removing the third portion of the dielectric layer further includes etching the third portion of the dielectric layer.

8. The method of claim 7 , wherein etching includes etching using hydrofluoric acid.

9. The method of claim 7 , wherein etching includes etching using fluorine plasma.

10. A package comprising:
a substrate;
an adhesive layer on a side of the substrate;
a first layer on the adhesive layer, at least a portion of the first layer including a first metal;
a dielectric layer on the first layer;
a second layer on the dielectric layer, at least a portion of the second layer including a second metal;
a metal feature extending from the second metal portion of the second layer through the dielectric layer to the first metal portion of the first layer; and
wherein a portion of the dielectric layer proximate to the metal feature includes fluorine.

11. The package of claim 10 , wherein the dielectric layer includes barium, titanium, and oxygen.

12. The package of claim 10 , wherein the adhesive layer is a laminate primer layer.

13. The package of claim 10 , wherein the substrate includes an electrical component; and wherein the metal feature extends through the substrate to the electrical component and electrically couples with the electrical component.

14. The package of claim 10 , wherein the metal feature is a first metal feature; and
further comprising:
a second metal feature extending from another second metal portion of the second layer through the dielectric layer to the substrate, wherein a portion of the dielectric layer proximate to the second metal feature includes fluorine.

15. The package of claim 14 , wherein the second metal feature is electrically isolated from the first metal portion of the first layer.

16. The package of claim 15 , wherein the other second metal portion of the second layer overlaps the first metal portion of the first layer.

17. The package of claim 10 , wherein the first metal of the first layer or the second metal of the second layer includes a selected one or more of: nickel or copper.

Assignees

• Intel Corp

Inventors

• Jain Rahul
• Brown Andrew J
• Chatterjee Prithwish
• Vadlamani Sai
• Link Lauren

Classifications

• H10W20/495

  Capacitive arrangements or effects of, or between wiring layers · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• H10W70/05

  of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title

• H10D1/68

  Capacitors having no potential barriers · CPC title

• H10D1/682

  having dielectrics comprising perovskite structures · CPC title