Methods of providing dielectric to conductor adhesion in package structures

Patent metadata

Field	Value
Publication number	US-9633837-B2
Application number	US-201514830681-A
Country	US
Kind code	B2
Filing date	Aug 19, 2015
Priority date	Sep 28, 2012
Publication date	Apr 25, 2017
Grant date	Apr 25, 2017

Abstract

Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a CVD dielectric material on a package dielectric material, and then forming a conductive material on the CVD dielectric material.

First claim

What is claimed is:

1. A method of forming a package structure comprising:
forming a first CVD dielectric material on a first dielectric material;
forming openings in the first CVD dielectric material;
forming openings in the first dielectric material;
forming conductive material in the openings and over at least a portion of a top surface of the first CVD dielectric; and
depositing a second CVD dielectric material over the conductive material, wherein the second CVD dielectric material contacts a sidewall surface and a top surface of the conductive material, and wherein at least a portion of the conductive material remains in contact with the top surface of the first CVD dielectric.

2. The method of claim 1 further comprising forming a second dielectric material on the second CVD dielectric material.

3. The method of claim 2 further comprising wherein the first and the second dielectric materials comprise package build up layers.

4. The method of claim 1 further comprising wherein the first and the second CVD dielectric materials comprise a thickness of about 100 angstroms to about 1000 angstroms.

5. The method of claim 1 further comprising wherein the conductive material comprises copper.

6. The method of claim 5 further comprising wherein the copper is substantially smooth around an outer region at an interface between the copper and package dielectric.

7. The method of claim 5 further comprising wherein the copper comprises a roughness of less than about 0.1 micron to about 0.5 micron.

8. The method of claim 1 further comprising wherein the package structure comprises a portion of a BBUL package.

9. The method of claim 1 further comprising wherein forming the openings comprises forming vias, and wherein the openings are formed using one of a lithographic process and a laser drilling process.

10. The method of claim 9 further comprising wherein the package structure further comprises a die coupled to the package structure.

11. The method of claim 10 further comprising wherein the die comprises one of a logic and a memory die.

12. The method of claim 1 wherein forming the openings in the first CVD dielectric material and in the first dielectric material comprises:
forming a dry film resist (DFR) on the first CVD dielectric material;
forming microvia openings in the first CVD dielectric material;
removing the DFR; and
forming microvia openings in the first dielectric material, wherein the first CVD dielectric material serves as a hard mask for the first dielectric material removal.

13. The method of claim 1 further comprising wherein the first and the second CVD dielectric materials comprise at least one of a silicon nitride, a non conductive silicon carbide, a carbon doped silicon nitride, a nitrogen doped silicon carbide, a carbon doped silicon oxynitride, a carbon doped oxide and a silicon oxynitride.

14. The method of claim 1 further comprising wherein the first CVD dielectric material and the second CVD dielectric material form covalent bonds with the conductive material.

15. The method of claim 1 further comprising wherein at least one of the first and the second CVD dielectric material forms a barrier layer for electromigration.

16. The method of claim 1 wherein at least one of the first and the second CVD dielectric materials comprise a PECVD dielectric material.

Assignees

• Intel Corp

Inventors

• Raghunathan Vinodhkumar
• Andideh Ebrahim

Classifications

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/6927

  the material being a silicon oxynitride, e.g. SiON or SiON:H · CPC title

• H10P14/6905

  being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H · CPC title

• H10P14/6903

  containing silicon · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title