Multi stack optical elements using temporary and permanent bonding

Patent metadata

Field	Value
Publication number	US-11626321-B2
Application number	US-202016882177-A
Country	US
Kind code	B2
Filing date	May 22, 2020
Priority date	Apr 16, 2018
Publication date	Apr 11, 2023
Grant date	Apr 11, 2023

Abstract

Systems and methods herein are related to the formation of optical devices including stacked optical element layers using silicon wafers, glass, or devices as substrates. The optical elements discussed herein can be fabricated on temporary or permanent substrates. In some examples, the optical devices are fabricated to include transparent substrates or devices including charge-coupled devices (CCD), or complementary metal-oxide semiconductor (CMOS) image sensors, light-emitting diodes (LED), a micro-LED (uLED) display, organic light-emitting diode (OLED) or vertical-cavity surface-emitting laser (VCSELs). The optical elements can have interlayers formed in between optical element layers, where the interlayers can range in thickness from 1 nm to 3 mm.

First claim

What is claimed:

1. A method for forming an optical device, comprising:
disposing a de-bonding layer on a substrate;
disposing a first target layer on the de-bonding layer;
patterning the first target layer to form a first pattern of a plurality of first trenches, each first trench of the plurality of first trenches defined by adjacent first islands of a plurality of first islands, the patterning the first target layer including a first process comprising one of nano-imprint lithography (NIL), dry etching, or wet etching;
depositing a first fill layer in the plurality of first trenches and over the plurality of first islands;
removing a residual material of the first fill layer such that a top surface of the first fill layer is coplanar with a top surface of each of the plurality of first islands;
disposing a second fill layer over the first fill layer and the plurality of first islands after the step of removing the residual material of the first fill layer, wherein the second fill layer, the plurality of first islands, and the first fill layer in the plurality of first trenches form a first optical element layer;
disposing a second target layer over the first optical element layer;
patterning the second target layer to form a second pattern of a plurality of second trenches, each second trench of the plurality of second trenches defined by adjacent second islands of a plurality of second islands, the patterning the second target layer including a second process comprising one of NIL, dry etching, or wet etching;
depositing a third fill layer in the plurality of second trenches and over the plurality of second islands; and
removing a residual material of the third fill layer such that a top surface of the second third fill layer is coplanar with a top surface of each of the plurality of second islands.

2. The method of claim 1 , wherein a selection of the second process is different than that of the first process.

3. The method of claim 1 , further comprising:
removing the first fill layer to achieve a pre-determined flatness.

4. The method of claim 3 , wherein the substrate comprises one of a charge-coupled devices (CCD), a complementary metal-oxide semiconductor (CMOS), a vertical-cavity surface-emitting laser (VCSEL), light-emitting diode (LED), an organic light-emitting diode (OLED), and a micro LED (uLED) component.

5. The method of claim 1 , wherein the first pattern of the plurality of first islands of the first optical element layer is different than the second pattern of the plurality of second islands of the second optical element layer.

6. The method of claim 1 , wherein the first target layer and the second target layer are different materials.

7. The method of claim 1 , wherein the plurality of first islands and the plurality of second islands have different heights.

8. A method for fabricating optical devices, comprising:
providing a substrate;
forming a de-bonding layer on the substrate;
forming a first target layer on the de-bonding layer and forming a first pattern on the first target layer by one of NIL, dry etching, or wet etching;
forming a first fill layer over the first pattern;
forming a second fill layer over the first fill layer; and
forming a second target layer over the second fill layer and forming a second pattern on the second target layer in a manner that is different from that used to form the first pattern on the first target layer such that the forming of the second pattern by one of NIL, dry etching, or wet etching is different from the forming of the first pattern.

9. The method of claim 8 , wherein the substrate comprises one of a charge-coupled devices (CCD), a complementary metal-oxide semiconductor (CMOS), a vertical-cavity surface-emitting laser (VCSEL), light-emitting diode (LED), an organic light-emitting diode (OLED), and a micro-LED (uLED) component.

10. The method of claim 8 , further comprising forming a third layer over the second layer and forming a third pattern on the third layer in a manner that is different from that used to form one of the first pattern and the second pattern such that the forming of the third pattern by one of NIL, dry etching, or wet etching is different from the forming of the first pattern or the forming of the second pattern.

Assignees

• Applied Materials Inc

Inventors

• Godet Ludovic
• Mcmillan Wayne
• Meyer Timmerman Thijssen Rutger
• Argaman Naamah
• Roy Tapashree
• Doshay Sage Toko Garrett

Classifications

• H10P50/667

  by liquid etching only · CPC title

• H10P50/28

  of insulating materials · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W20/089 Primary

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

• H10H20/80

  Constructional details · CPC title